--- /dev/null
+../scripts/compile.pl
\ No newline at end of file
--TDC settings
constant NUM_TDC_MODULES : integer range 1 to 4 := 1; -- number of tdc modules to implement
- constant NUM_TDC_CHANNELS : integer range 1 to 65 := 5; -- number of tdc channels per module
+ constant NUM_TDC_CHANNELS : integer range 1 to 65 := 65; -- number of tdc channels per module
constant NUM_TDC_CHANNELS_POWER2 : integer range 0 to 6 := 5; --the nearest power of two, for convenience reasons
constant DOUBLE_EDGE_TYPE : integer range 0 to 3 := 2; --double edge type: 0, 1, 2, 3
-- 0: single edge only,
--- /dev/null
+config_compile_gsi.pl
\ No newline at end of file
--- /dev/null
+TOPNAME => "trb3_periph_32PinAddOn",
+lm_license_file_for_synplify => "27000\@lxcad01.gsi.de",
+lm_license_file_for_par => "1702\@hadeb05.gsi.de",
+lattice_path => '/opt/lattice/diamond/3.4_x64/',
+synplify_path => '/opt/synplicity/J-2014.09-SP2',
+#synplify_command => "/opt/lattice/diamond/3.4_x64/bin/lin64/synpwrap -fg -options",
+synplify_command => "/opt/synplicity/J-2014.09-SP2/bin/synplify_premier_dp",
+
+#Include only necessary lpf files
+include_TDC => 1,
+include_GBE => 0,
+
+#Report settings
+firefox_open => 0,
+twr_number_of_errors => 20,
+
+
--- /dev/null
+// nodes file for parallel place&route
+
+[lxhadeb07]
+SYSTEM = linux
+CORENUM = 32
+ENV = /u/cugur/depc363/bin/diamond_setup_x64.sh
+WORKDIR = /u/cugur/depc363/Projects/TDC_on_TRB3/trb3/32PinAddOn/workdir
-../../tdc/releases/tdc_v2.1.2
\ No newline at end of file
+../../tdc/releases/tdc_v2.1.5
\ No newline at end of file
####################
-#project files
+
+#add_file options
+
add_file -vhdl -lib work "version.vhd"
-add_file -vhdl -lib work "tdc_release/tdc_version.vhd"
add_file -vhdl -lib work "config.vhd"
add_file -vhdl -lib work "../../trbnet/trb_net_std.vhd"
add_file -vhdl -lib work "../../trbnet/trb_net_components.vhd"
add_file -vhdl -lib work "../base/trb3_components.vhd"
-add_file -vhdl -lib work "tdc_release/tdc_components.vhd"
+add_file -vhdl -lib work "tdc_release/tdc_version.vhd"
+add_file -vhdl -lib work "../../trbnet/trb_net16_term_buf.vhd"
add_file -vhdl -lib work "../../trbnet/trb_net_CRC.vhd"
add_file -vhdl -lib work "../../trbnet/trb_net_CRC8.vhd"
add_file -vhdl -lib work "../../trbnet/trb_net_onewire.vhd"
+add_file -vhdl -lib work "../../trbnet/trb_net16_addresses.vhd"
+add_file -vhdl -lib work "../../trbnet/trb_net16_term.vhd"
add_file -vhdl -lib work "../../trbnet/trb_net_sbuf.vhd"
add_file -vhdl -lib work "../../trbnet/trb_net_sbuf5.vhd"
add_file -vhdl -lib work "../../trbnet/trb_net_sbuf6.vhd"
+add_file -vhdl -lib work "../../trbnet/trb_net16_sbuf.vhd"
+add_file -vhdl -lib work "../../trbnet/trb_net16_regIO.vhd"
+add_file -vhdl -lib work "../../trbnet/trb_net16_regio_bus_handler.vhd"
add_file -vhdl -lib work "../../trbnet/trb_net_priority_encoder.vhd"
add_file -vhdl -lib work "../../trbnet/trb_net_dummy_fifo.vhd"
+add_file -vhdl -lib work "../../trbnet/trb_net16_dummy_fifo.vhd"
+add_file -vhdl -lib work "../../trbnet/trb_net16_term_ibuf.vhd"
add_file -vhdl -lib work "../../trbnet/trb_net_priority_arbiter.vhd"
add_file -vhdl -lib work "../../trbnet/trb_net_pattern_gen.vhd"
-
-add_file -vhdl -lib work "../../trbnet/trb_net16_addresses.vhd"
-add_file -vhdl -lib work "../../trbnet/trb_net16_api_base.vhd"
-add_file -vhdl -lib work "../../trbnet/trb_net16_dummy_fifo.vhd"
-add_file -vhdl -lib work "../../trbnet/trb_net16_endpoint_hades_full.vhd"
-add_file -vhdl -lib work "../../trbnet/trb_net16_endpoint_hades_full_handler.vhd"
-add_file -vhdl -lib work "../../trbnet/trb_net16_ipudata.vhd"
-add_file -vhdl -lib work "../../trbnet/trb_net16_iobuf.vhd"
-add_file -vhdl -lib work "../../trbnet/trb_net16_io_multiplexer.vhd"
-add_file -vhdl -lib work "../../trbnet/trb_net16_ibuf.vhd"
add_file -vhdl -lib work "../../trbnet/trb_net16_obuf_nodata.vhd"
add_file -vhdl -lib work "../../trbnet/trb_net16_obuf.vhd"
-add_file -vhdl -lib work "../../trbnet/trb_net16_regIO.vhd"
-add_file -vhdl -lib work "../../trbnet/trb_net16_regio_bus_handler.vhd"
-add_file -vhdl -lib work "../../trbnet/trb_net16_sbuf.vhd"
-add_file -vhdl -lib work "../../trbnet/trb_net16_term_buf.vhd"
-add_file -vhdl -lib work "../../trbnet/trb_net16_term.vhd"
-add_file -vhdl -lib work "../../trbnet/trb_net16_term_ibuf.vhd"
+add_file -vhdl -lib work "../../trbnet/trb_net16_iobuf.vhd"
+add_file -vhdl -lib work "../../trbnet/trb_net16_api_base.vhd"
+add_file -vhdl -lib work "../../trbnet/trb_net16_ibuf.vhd"
+add_file -vhdl -lib work "../../trbnet/trb_net16_io_multiplexer.vhd"
add_file -vhdl -lib work "../../trbnet/trb_net16_trigger.vhd"
+add_file -vhdl -lib work "../../trbnet/trb_net16_ipudata.vhd"
+add_file -vhdl -lib work "../../trbnet/trb_net16_endpoint_hades_full.vhd"
+add_file -vhdl -lib work "../../trbnet/trb_net16_endpoint_hades_full_handler.vhd"
add_file -vhdl -lib work "../../trbnet/basics/rom_16x8.vhd"
add_file -vhdl -lib work "../../trbnet/basics/ram.vhd"
add_file -vhdl -lib work "../../trbnet/special/handler_trigger_and_data.vhd"
add_file -vhdl -lib work "../../trbnet/special/trb_net_reset_handler.vhd"
add_file -vhdl -lib work "../../trbnet/special/fpga_reboot.vhd"
-add_file -vhdl -lib work "../../trbnet/special/spi_flash_and_fpga_reload.vhd"
-add_file -vhdl -lib work "../../trbnet/special/bus_register_handler.vhd"
add_file -vhdl -lib work "../../trbnet/special/spi_slim.vhd"
add_file -vhdl -lib work "../../trbnet/special/spi_master.vhd"
add_file -vhdl -lib work "../../trbnet/special/spi_databus_memory.vhd"
add_file -vhdl -lib work "../../trbnet/special/spi_ltc2600.vhd"
+add_file -vhdl -lib work "../../trbnet/special/spi_flash_and_fpga_reload.vhd"
+add_file -vhdl -lib work "../../trbnet/special/bus_register_handler.vhd"
add_file -vhdl -lib work "../../trbnet/lattice/ecp3/lattice_ecp2m_fifo.vhd"
add_file -vhdl -lib work "../../trbnet/lattice/ecp3/lattice_ecp3_fifo_18x1k.vhd"
add_file -vhdl -lib work "../../trbnet/media_interfaces/trb_net16_lsm_sfp.vhd"
add_file -vhdl -lib work "../../trbnet/media_interfaces/trb_net16_med_ecp3_sfp.vhd"
-add_file -vhdl -lib "work" "../base/cores/pll_in200_out100.vhd"
+add_file -vhdl -lib work "../base/cores/pll_in200_out100.vhd"
+add_file -vhdl -lib work "../base/code/input_to_trigger_logic.vhd"
+add_file -vhdl -lib work "../base/code/input_statistics.vhd"
+add_file -vhdl -lib work "../base/code/sedcheck.vhd"
-
-###############
-#Change path to tdc release also in compile script!
-###############
add_file -vhdl -lib work "tdc_release/tdc_components.vhd"
add_file -vhdl -lib work "tdc_release/bit_sync.vhd"
add_file -vhdl -lib work "tdc_release/BusHandler.vhd"
add_file -vhdl -lib work "../../tdc/base/cores/ecp3/FIFO/FIFO_36x128_OutReg.vhd"
add_file -vhdl -lib work "../../tdc/base/cores/ecp3/FIFO/FIFO_36x64_OutReg.vhd"
add_file -vhdl -lib work "../../tdc/base/cores/ecp3/FIFO/FIFO_36x32_OutReg.vhd"
-add_file -vhdl -lib work "../../tdc/base/cores/ecp3/PLL/pll_in125_out333.vhd"
-
-add_file -vhdl -lib "work" "../base/code/input_to_trigger_logic.vhd"
-add_file -vhdl -lib "work" "../base/code/input_statistics.vhd"
-add_file -vhdl -lib "work" "../base/code/sedcheck.vhd"
+add_file -vhdl -lib work "../../tdc/base/cores/ecp3/PLL/pll_in125_out33.vhd"
-add_file -vhdl -lib "work" "trb3_periph_32PinAddOn.vhd"
+add_file -vhdl -lib work "trb3_periph_32PinAddOn.vhd"
--- /dev/null
+../scripts/compile.pl
\ No newline at end of file
+++ /dev/null
-#!/usr/bin/perl
-use Data::Dumper;
-use warnings;
-use strict;
-use FileHandle;
-use Getopt::Long;
-
-###################################################################################
-#Settings for this project
-my $TOPNAME = "trb3_periph_gpin"; #Name of top-level entity
-my $IMPLEMENTATION = "gpin";
-my $lattice_path = '/opt/lattice/diamond/3.1/';
-my $lattice_bin_path = "$lattice_path/bin/lin"; # note the lin/lin64 at the end, no isfgpa needed
-my $synplify_path = '/opt/synplicity/I-2013.09-SP1';
-my $lm_license_file_for_synplify = "27000\@lxcad01.gsi.de";
-my $lm_license_file_for_par = "1702\@hadeb05.gsi.de";
-###################################################################################
-
-# source the standard lattice environment
-$ENV{bindir}="$lattice_bin_path";
-open my $SOURCE, "bash -c '. $lattice_bin_path/diamond_env >& /dev/null; env'|" or
- die "Can't fork: $!";
-while (<$SOURCE>) {
- if (/^(.*)=(.*)/) {
- $ENV{$1} = ${2} ;
- }
-}
-close $SOURCE;
-
-
-$ENV{'PAR_DESIGN_NAME'}=$TOPNAME;
-$ENV{'SYNPLIFY'}=$synplify_path;
-$ENV{'SYN_DISABLE_RAINBOW_DONGLE'}=1;
-$ENV{'LM_LICENSE_FILE'}=$lm_license_file_for_synplify;
-
-
-my $FAMILYNAME="LatticeECP3";
-my $DEVICENAME="LFE3-150EA";
-my $PACKAGE="FPBGA672";
-my $SPEEDGRADE="8";
-
-my $WORKDIR = "workdir_bit";
-unless(-d $WORKDIR) {
- mkdir $WORKDIR or die "can't create workdir '$WORKDIR': $!";
-}
-
-system("ln -sfT $lattice_path $WORKDIR/lattice-diamond");
-
-chdir $WORKDIR;
-system("cp -p ../diamond/$IMPLEMENTATION/sfp*.txt .");
-system("cp -p ../diamond/$IMPLEMENTATION/$TOPNAME.ncd .");
-system("cp -p ../diamond/$IMPLEMENTATION/$TOPNAME.prf .");
-
-$ENV{'LM_LICENSE_FILE'}=$lm_license_file_for_par;
-
-my $c=qq|ltxt2ptxt $TOPNAME.ncd|;
-execute($c);
-
-$c=qq|bitgen -w -g CfgMode:Disable -g RamCfg:Reset -g ES:No $TOPNAME.ncd $TOPNAME.bit $TOPNAME.prf|;
-# $c=qq|$lattice_path/ispfpga/bin/lin/bitgen -w "$TOPNAME.ncd" "$TOPNAME.prf"|;
-execute($c);
-
-chdir "..";
-exit;
-
-sub execute {
- my ($c, $op) = @_;
- #print "option: $op \n";
- $op = "" if(!$op);
- print "\n\ncommand to execute: $c \n";
- my $r=system($c);
- if($r) {
- print "$!";
- if($op ne "do_not_exit") {
- exit;
- }
- }
- return $r;
-}
+++ /dev/null
-#!/usr/bin/perl
-use Data::Dumper;
-use warnings;
-use strict;
-
-my $TOPNAME = "trb3_periph_gpin"; #Name of top-level entity
-
-#create full lpf file
-system("cp ../base/$TOPNAME.lpf diamond/trb3_periph.lpf");
-system("cat currentRelease/trbnet_constraints.lpf >> diamond/trb3_periph.lpf");
-system("cat currentRelease/tdc_constraints_64.lpf >> diamond/trb3_periph.lpf");
-system("cat currentRelease/unimportant_lines_constraints.lpf >> diamond/trb3_periph.lpf");
-system("cat unimportant_lines_constraints.lpf >> diamond/trb3_periph.lpf");
--TDC settings
constant NUM_TDC_MODULES : integer range 1 to 4 := 1; -- number of tdc modules to implement
- constant NUM_TDC_CHANNELS : integer range 1 to 65 := 49; -- number of tdc channels per module
+ constant NUM_TDC_CHANNELS : integer range 1 to 65 := 25; -- number of tdc channels per module
constant NUM_TDC_CHANNELS_POWER2 : integer range 0 to 6 := 5; --the nearest power of two, for convenience reasons
- constant DOUBLE_EDGE_TYPE : integer range 0 to 3 := 2; --double edge type: 0, 1, 2, 3
+ constant DOUBLE_EDGE_TYPE : integer range 0 to 3 := 3; --double edge type: 0, 1, 2, 3
-- 0: single edge only,
-- 1: same channel,
-- 2: alternating channels,
constant INCLUDE_SPI : integer := c_NO; --there is no spi connector on the addon
--Add logic to generate configurable trigger signal from input signals.
- constant INCLUDE_TRIGGER_LOGIC : integer := c_YES;
+ constant INCLUDE_TRIGGER_LOGIC : integer := c_NO;
constant INCLUDE_STATISTICS : integer := c_YES; --Do histos of all inputs
constant PHYSICAL_INPUTS : integer := 24; --number of inputs connected
constant USE_SINGLE_FIFO : integer := c_YES; -- single fifo for statistics
--- /dev/null
+config_compile_gsi.pl
\ No newline at end of file
--- /dev/null
+TOPNAME => "trb3_periph_gpin",
+lm_license_file_for_synplify => "27000\@lxcad01.gsi.de",
+lm_license_file_for_par => "1702\@hadeb05.gsi.de",
+lattice_path => '/opt/lattice/diamond/3.4_x64/',
+synplify_path => '/opt/synplicity/J-2014.09-SP2',
+#synplify_command => "/opt/lattice/diamond/3.4_x64/bin/lin64/synpwrap -fg -options",
+synplify_command => "/opt/synplicity/J-2014.09-SP2/bin/synplify_premier_dp",
+
+#Include only necessary lpf files
+include_TDC => 1,
+include_GBE => 0,
+
+#Report settings
+firefox_open => 0,
+twr_number_of_errors => 20,
+
+
+++ /dev/null
-../tdc_releases/tdc_v2.1.1
\ No newline at end of file
--- /dev/null
+../../tdc/releases/tdc_v2.1.4
\ No newline at end of file
#add_file options
add_file -vhdl -lib work "version.vhd"
+add_file -vhdl -lib work "config.vhd"
add_file -vhdl -lib work "../../trbnet/trb_net_std.vhd"
add_file -vhdl -lib work "../../trbnet/trb_net_components.vhd"
-add_file -vhdl -lib "work" "../base/trb3_components.vhd"
+add_file -vhdl -lib work "../base/trb3_components.vhd"
+add_file -vhdl -lib work "tdc_release/tdc_version.vhd"
add_file -vhdl -lib work "../../trbnet/trb_net16_term_buf.vhd"
add_file -vhdl -lib work "../../trbnet/trb_net_CRC.vhd"
add_file -vhdl -lib work "../../trbnet/trb_net_CRC8.vhd"
add_file -vhdl -lib work "../../trbnet/trb_net_onewire.vhd"
-add_file -vhdl -lib work "../../trbnet/basics/rom_16x8.vhd"
-add_file -vhdl -lib work "../../trbnet/basics/ram.vhd"
-add_file -vhdl -lib work "../../trbnet/basics/pulse_sync.vhd"
-add_file -vhdl -lib work "../../trbnet/basics/state_sync.vhd"
-add_file -vhdl -lib work "../../trbnet/basics/ram_16x8_dp.vhd"
-add_file -vhdl -lib work "../../trbnet/basics/ram_16x16_dp.vhd"
add_file -vhdl -lib work "../../trbnet/trb_net16_addresses.vhd"
-add_file -vhdl -lib work "../../trbnet/basics/ram_dp.vhd"
add_file -vhdl -lib work "../../trbnet/trb_net16_term.vhd"
add_file -vhdl -lib work "../../trbnet/trb_net_sbuf.vhd"
add_file -vhdl -lib work "../../trbnet/trb_net_sbuf5.vhd"
add_file -vhdl -lib work "../../trbnet/trb_net16_trigger.vhd"
add_file -vhdl -lib work "../../trbnet/trb_net16_ipudata.vhd"
add_file -vhdl -lib work "../../trbnet/trb_net16_endpoint_hades_full.vhd"
+add_file -vhdl -lib work "../../trbnet/trb_net16_endpoint_hades_full_handler.vhd"
+
+add_file -vhdl -lib work "../../trbnet/basics/rom_16x8.vhd"
+add_file -vhdl -lib work "../../trbnet/basics/ram.vhd"
+add_file -vhdl -lib work "../../trbnet/basics/pulse_sync.vhd"
+add_file -vhdl -lib work "../../trbnet/basics/state_sync.vhd"
+add_file -vhdl -lib work "../../trbnet/basics/ram_16x8_dp.vhd"
+add_file -vhdl -lib work "../../trbnet/basics/ram_16x16_dp.vhd"
+add_file -vhdl -lib work "../../trbnet/basics/ram_dp.vhd"
add_file -vhdl -lib work "../../trbnet/basics/signal_sync.vhd"
add_file -vhdl -lib work "../../trbnet/basics/ram_dp_rw.vhd"
add_file -vhdl -lib work "../../trbnet/basics/pulse_stretch.vhd"
add_file -vhdl -lib work "../../trbnet/special/handler_ipu.vhd"
add_file -vhdl -lib work "../../trbnet/special/handler_trigger_and_data.vhd"
add_file -vhdl -lib work "../../trbnet/special/trb_net_reset_handler.vhd"
-add_file -vhdl -lib work "../../trbnet/trb_net16_endpoint_hades_full_handler.vhd"
add_file -vhdl -lib work "../../trbnet/special/fpga_reboot.vhd"
+add_file -vhdl -lib work "../../trbnet/special/spi_slim.vhd"
+add_file -vhdl -lib work "../../trbnet/special/spi_master.vhd"
+add_file -vhdl -lib work "../../trbnet/special/spi_databus_memory.vhd"
+add_file -vhdl -lib work "../../trbnet/special/spi_ltc2600.vhd"
+add_file -vhdl -lib work "../../trbnet/special/spi_flash_and_fpga_reload.vhd"
+add_file -vhdl -lib work "../../trbnet/special/bus_register_handler.vhd"
add_file -vhdl -lib work "../../trbnet/lattice/ecp3/lattice_ecp3_fifo_18x1k.vhd"
add_file -vhdl -lib work "../../trbnet/lattice/ecp3/trb_net16_fifo_arch.vhd"
add_file -vhdl -lib work "../../trbnet/lattice/ecp3/fifo/fifo_19x16_obuf.vhd"
add_file -vhdl -lib work "../../trbnet/lattice/ecp3/lattice_ecp3_fifo_16x16_dualport.vhd"
add_file -vhdl -lib work "../../trbnet/lattice/ecp3/lattice_ecp3_fifo_18x16_dualport.vhd"
-
add_file -vhdl -lib work "../../trbnet/lattice/ecp3/spi_dpram_32_to_8.vhd"
-add_file -vhdl -lib work "../../trbnet/special/spi_slim.vhd"
-add_file -vhdl -lib work "../../trbnet/special/spi_master.vhd"
-add_file -vhdl -lib work "../../trbnet/special/spi_databus_memory.vhd"
-add_file -vhdl -lib work "../../trbnet/special/spi_ltc2600.vhd"
add_file -vhdl -lib work "../../trbnet/optical_link/f_divider.vhd"
-
add_file -vhdl -lib work "../../trbnet/media_interfaces/ecp3_sfp/sfp_1_200_int.vhd"
add_file -vhdl -lib work "../../trbnet/media_interfaces/trb_net16_lsm_sfp.vhd"
add_file -vhdl -lib work "../../trbnet/media_interfaces/trb_net16_med_ecp3_sfp.vhd"
-add_file -vhdl -lib "work" "../base/cores/pll_in200_out100.vhd"
-
-
-
-
-###############
-#Change path to tdc release also in compile script!
-###############
-#add_file -vhdl -lib "work" "../tdc_releases/tdc_v1.5/Adder_304.vhd"
-add_file -vhdl -lib "work" "../tdc_releases/tdc_v1.5/bit_sync.vhd"
-add_file -vhdl -lib "work" "../tdc_releases/tdc_v1.5/BusHandler.vhd"
-add_file -vhdl -lib "work" "../tdc_releases/tdc_v1.5/Channel.vhd"
-add_file -vhdl -lib "work" "../tdc_releases/tdc_v1.5/Channel_200.vhd"
-add_file -vhdl -lib "work" "../tdc_releases/tdc_v1.5/Encoder_304_Bit.vhd"
-add_file -vhdl -lib "work" "../tdc_releases/tdc_v1.5/FIFO_32x32_OutReg.vhd"
-add_file -vhdl -lib "work" "../tdc_releases/tdc_v1.5/LogicAnalyser.vhd"
-add_file -vhdl -lib "work" "../tdc_releases/tdc_v1.5/Readout.vhd"
-add_file -vhdl -lib "work" "../tdc_releases/tdc_v1.5/Reference_Channel_200.vhd"
-add_file -vhdl -lib "work" "../tdc_releases/tdc_v1.5/Reference_Channel.vhd"
-add_file -vhdl -lib "work" "../tdc_releases/tdc_v1.5/ROM_encoder_3.vhd"
-add_file -vhdl -lib "work" "../tdc_releases/tdc_v1.5/ROM_FIFO.vhd"
-add_file -vhdl -lib "work" "../tdc_releases/tdc_v1.5/ShiftRegisterSISO.vhd"
-add_file -vhdl -lib "work" "../tdc_releases/tdc_v1.5/TDC.vhd"
-add_file -vhdl -lib "work" "../tdc_releases/tdc_v1.5/up_counter.vhd"
-
-add_file -vhdl -lib "work" "trb3_periph_gpin.vhd"
+add_file -vhdl -lib work "../base/cores/pll_in200_out100.vhd"
+add_file -vhdl -lib work "../base/code/input_to_trigger_logic.vhd"
+add_file -vhdl -lib work "../base/code/input_statistics.vhd"
+add_file -vhdl -lib work "../base/code/sedcheck.vhd"
+
+
+#add_file -vhdl -lib work "tdc_release/Adder_304.vhd"
+add_file -vhdl -lib work "tdc_release/tdc_components.vhd"
+add_file -vhdl -lib work "tdc_release/bit_sync.vhd"
+add_file -vhdl -lib work "tdc_release/BusHandler.vhd"
+add_file -vhdl -lib work "tdc_release/Channel_200.vhd"
+add_file -vhdl -lib work "tdc_release/Channel.vhd"
+add_file -vhdl -lib work "tdc_release/Encoder_304_Bit.vhd"
+add_file -vhdl -lib work "tdc_release/fallingEdgeDetect.vhd"
+add_file -vhdl -lib work "tdc_release/hit_mux.vhd"
+add_file -vhdl -lib work "tdc_release/LogicAnalyser.vhd"
+add_file -vhdl -lib work "tdc_release/Readout.vhd"
+add_file -vhdl -lib work "tdc_release/risingEdgeDetect.vhd"
+add_file -vhdl -lib work "tdc_release/ROM_encoder_ecp3.vhd"
+add_file -vhdl -lib work "tdc_release/ShiftRegisterSISO.vhd"
+add_file -vhdl -lib work "tdc_release/Stretcher_A.vhd"
+add_file -vhdl -lib work "tdc_release/Stretcher_B.vhd"
+add_file -vhdl -lib work "tdc_release/Stretcher.vhd"
+add_file -vhdl -lib work "tdc_release/TDC.vhd"
+add_file -vhdl -lib work "tdc_release/TriggerHandler.vhd"
+add_file -vhdl -lib work "tdc_release/up_counter.vhd"
+
+add_file -vhdl -lib work "../../tdc/base/cores/ecp3/PLL/pll_in125_out33.vhd"
+add_file -vhdl -lib work "../../tdc/base/cores/ecp3/FIFO/FIFO_DC_36x128_DynThr_OutReg.vhd"
+add_file -vhdl -lib work "../../tdc/base/cores/ecp3/FIFO/FIFO_DC_36x128_OutReg.vhd"
+add_file -vhdl -lib work "../../tdc/base/cores/ecp3/FIFO/FIFO_DC_36x64_OutReg.vhd"
+add_file -vhdl -lib work "../../tdc/base/cores/ecp3/FIFO/FIFO_DC_36x32_OutReg.vhd"
+add_file -vhdl -lib work "../../tdc/base/cores/ecp3/FIFO/FIFO_36x128_OutReg.vhd"
+add_file -vhdl -lib work "../../tdc/base/cores/ecp3/FIFO/FIFO_36x64_OutReg.vhd"
+add_file -vhdl -lib work "../../tdc/base/cores/ecp3/FIFO/FIFO_36x32_OutReg.vhd"
+
+add_file -vhdl -lib work "trb3_periph_gpin.vhd"
-currentRelease/trb3_periph_gpin.vhd
\ No newline at end of file
+tdc_release/trb3_periph_gpin.vhd
\ No newline at end of file
--- /dev/null
+#!/usr/bin/perl
+use Data::Dumper;
+use warnings;
+use strict;
+use FileHandle;
+use Getopt::Long;
+use Term::ANSIColor qw(:constants);
+
+my %config = do "config_compile.pl";
+
+
+my $TOPNAME = $config{TOPNAME};
+my $lattice_path = $config{lattice_path};
+my $synplify_path = $config{synplify_path};
+my $lm_license_file_for_synplify = $config{lm_license_file_for_synplify};
+my $lm_license_file_for_par = $config{lm_license_file_for_par};
+my $synplify_command = $config{synplify_command};
+
+my $synplify_locale_workaround = "en_US\@UTF-8";
+my $lattice_bin_path = "$lattice_path/bin/lin64"; # note the lin/lin64 at the end, no isfgpa needed
+
+my $include_TDC = $config{include_TDC} || 0;
+my $include_GBE = $config{include_GBE} || 0;
+my $twr_number_of_errors = $config{twr_number_of_errors} || 10;
+
+
+###################################################################################
+#Settings for this project
+
+###################################################################################
+
+###################################################################################
+#Options for the script
+my $help = "";
+my $isMultiPar = 0; # set it to zero for single par run on the local machine
+my $nrNodes = 0; # set it to one for single par run on the local machine
+my $all = 1;
+my $syn = 0;
+my $map = 0;
+my $par = 0;
+my $timing = 0;
+my $bitgen = 0;
+
+my $result = GetOptions (
+ "h|help" => \$help,
+ "m|mpar=i" => \$nrNodes,
+ "a|all" => \$all,
+ "s|syn" => \$syn,
+ "mp|map" => \$map,
+ "p|par" => \$par,
+ "t|timing" => \$timing,
+ "b|bitgen" => \$bitgen,
+ );
+
+if($help) {
+ print "Usage: compile_priph_gsi.de <OPTIONS><ARGUMENTS>\n\n";
+ print "-h --help\tPrints the usage manual.\n";
+ print "-a --all\tRun all compile script. By default the script is going to run the whole process.\n";
+ print "-s --syn\tRun synthesis part of the compile script.\n";
+ print "-mp --map\tRun map part of the compile script.\n";
+ print "-p --par\tRun par part of the compile script.\n";
+ print "-t --timing\tRun timing analysis part of the compile script.\n";
+ print "-b --bitgen\tRun bit generation part of the compile script.\n";
+ print "-m --mpar\tSwitch for multi par. \"-m <number_of_nodes>\" (Default = off)\n";
+ print "\t\tThe node list file name has to be edited in the script. (Default = nodes_lxhadeb07.txt)\n";
+ print "\n";
+ exit;
+}
+
+if ($nrNodes!=0){
+ $isMultiPar=1;
+}
+if ($syn!=0 || $map!=0 || $par!=0 || $timing!=0 || $bitgen!=0){
+ $all=0;
+}
+###################################################################################
+
+
+# source the standard lattice environment
+$ENV{bindir}="$lattice_bin_path";
+open my $SOURCE, "bash -c '. $lattice_bin_path/diamond_env >& /dev/null; env'|" or
+ die "Can't fork: $!";
+while (<$SOURCE>) {
+ if (/^(.*)=(.*)/) {
+ $ENV{$1} = ${2} ;
+ }
+}
+close $SOURCE;
+
+
+
+$ENV{'PAR_DESIGN_NAME'}=$TOPNAME;
+$ENV{'SYNPLIFY'}=$synplify_path;
+$ENV{'LC_ALL'}="en_US\@UTF-8";
+$ENV{'SYN_DISABLE_RAINBOW_DONGLE'}=1;
+$ENV{'LM_LICENSE_FILE'}=$lm_license_file_for_synplify;
+
+
+my $FAMILYNAME="LatticeECP3";
+my $DEVICENAME="LFE3-150EA";
+my $PACKAGE="FPBGA672";
+my $SPEEDGRADE="8";
+
+my $WORKDIR = "workdir";
+unless(-d $WORKDIR) {
+ mkdir $WORKDIR or die "can't create workdir '$WORKDIR': $!";
+}
+
+system("ln -sfT $lattice_path $WORKDIR/lattice-diamond");
+
+#create full lpf file
+print GREEN, "Generating constraints file...\n\n", RESET;
+system("cp ../base/$TOPNAME.lpf $WORKDIR/$TOPNAME.lpf");
+
+if($include_TDC) {
+ system("cat tdc_release/trbnet_constraints.lpf >> $WORKDIR/$TOPNAME.lpf");
+ system("cat tdc_release/tdc_constraints_64.lpf >> $WORKDIR/$TOPNAME.lpf");
+ system("cat tdc_release/unimportant_lines_constraints.lpf >> $WORKDIR/$TOPNAME.lpf");
+ system("cat unimportant_lines_constraints.lpf >> $WORKDIR/$TOPNAME.lpf");
+}
+if($include_GBE) {
+
+}
+
+if($include_TDC) {
+ #copy delay line to project folder
+ system("rm $WORKDIR/Adder_304.ngo");
+ system("ln -s ../../../tdc/base/cores/ecp3/TDC/Adder_304.ngo $WORKDIR/Adder_304.ngo");
+}
+
+#generate timestamp
+my $t=time;
+my $fh = new FileHandle(">version.vhd");
+die "could not open file" if (! defined $fh);
+print $fh <<EOF;
+
+--## attention, automatically generated. Don't change by hand.
+library ieee;
+USE IEEE.std_logic_1164.ALL;
+USE IEEE.std_logic_ARITH.ALL;
+USE IEEE.std_logic_UNSIGNED.ALL;
+use ieee.numeric_std.all;
+
+package version is
+
+ constant VERSION_NUMBER_TIME : integer := $t;
+
+end package version;
+EOF
+$fh->close;
+
+system("env| grep LM_");
+my $r = "";
+my $c = "";
+my @a = ();
+my $tpmap = $TOPNAME . "_map" ;
+
+chdir $WORKDIR;
+if($syn==1 || $all==1){
+ system("rm $TOPNAME.edf");
+ print GREEN, "Starting synthesis process...\n\n", RESET;
+ $c="$synplify_path/bin/synplify_premier_dp -batch ../$TOPNAME.prj";
+ $r=execute($c, "do_not_exit" );
+
+ $fh = new FileHandle("<$TOPNAME".".srr");
+ @a = <$fh>;
+ $fh -> close;
+
+ foreach (@a)
+ {
+ if(/\@E:/)
+ {
+ print "\n";
+ $c="cat $TOPNAME.srr | egrep --color \"\@E:\"";
+ system($c);
+ print RED, "ERROR in the log file $TOPNAME.srr Exiting...\n\n", RESET;
+ exit 129;
+ }
+ }
+}
+
+
+
+$ENV{'LM_LICENSE_FILE'}=$lm_license_file_for_par;
+
+if($map==1 || $all==1){
+ print GREEN, "Starting mapping process...\n\n", RESET;
+
+ $c=qq|edif2ngd -path "../" -path "." -l $FAMILYNAME -d $DEVICENAME "$TOPNAME.edf" "$TOPNAME.ngo" |;
+ execute($c);
+
+ $c=qq|edfupdate -t "$TOPNAME.tcy" -w "$TOPNAME.ngo" -m "$TOPNAME.ngo" "$TOPNAME.ngx"|;
+ execute($c);
+
+ $c=qq|ngdbuild -a $FAMILYNAME -d $DEVICENAME -p "$lattice_path/ispfpga/ep5c00/data" -dt "$TOPNAME.ngo" "$TOPNAME.ngd"|;
+ execute($c);
+
+ $c=qq|map -retime -split_node -a $FAMILYNAME -p $DEVICENAME -t $PACKAGE -s $SPEEDGRADE "$TOPNAME.ngd" -pr "$TOPNAME.prf" -o "$tpmap.ncd" -mp "$TOPNAME.mrp" "$TOPNAME.lpf"|;
+ execute($c);
+
+ $c=qq|htmlrpt -mrp $TOPNAME.mrp $TOPNAME|;
+ execute($c);
+
+ $fh = new FileHandle("<$TOPNAME"."_mrp.html");
+ @a = <$fh>;
+ $fh -> close;
+ my $i=1;
+ my $print=0;
+ foreach (@a)
+ {
+ if(/WARNING/|$print)
+ {
+ if((grep /WARNING - map: There are semantic errors in the preference file/, $_) & ($i == 1))
+ {
+ last;
+ }
+ elsif(grep /WARNING - map: There are semantic errors in the preference file/, $_)
+ {
+ print RED, "There are errors in the constraints file. Better have a look...\n\n", RESET;
+ sleep(5); # ERROR -> sleep is effective before the print
+ last;
+ }
+ elsif ($i == 1)
+ {
+ print RED,"\n\n", RESET;
+ print RED,"#################################################\n", RESET;
+ print RED,"CONSTRAINTS ERRORS\n", RESET;
+ print RED,"#################################################\n\n", RESET;
+ }
+ $print=1;
+ if(grep /WARNING.*UGROUP/, $_)
+ {
+ print RED, $_, RESET;
+ }
+ elsif(grep /FC|hitBuf|ff_en/, $_)
+ {
+ print YELLOW, $_, RESET;
+ }
+ else
+ {
+ print $_;
+ }
+ $i++;
+ }
+ }
+}
+
+if($par==1 || $all==1){
+ print GREEN, "Starting placement process...\n\n", RESET;
+
+ system("rm $TOPNAME.ncd");
+ if ($isMultiPar)
+ {
+ $c=qq|LC_ALL=en_US.UTF-8; par -m ../nodes_lxhadeb07.txt -n $nrNodes -w -i 15 -l 5 -y -s 8 -t 33 -c 1 -e 2 -exp parCDP=1:parCDR=1:parPlcInLimit=0:parPlcInNeighborSize=1:parPathBased=ON:parHold=1:parHoldLimit=10000:paruseNBR=1 $tpmap.ncd $TOPNAME.dir $TOPNAME.prf;|;
+ execute($c);
+
+ # find and copy the .ncd file which has met the timing constraints
+ $fh = new FileHandle("<$TOPNAME".".par");
+ my @a = <$fh>;
+ my $isSuccess = 0;
+ $fh -> close;
+ my $i=1;
+ foreach (@a)
+ {
+ my @line = split(/\s+/, $_);
+
+ if(@line && ($line[2] =~ m/^[0-9]+$/) && ($line[4] =~ m/^[0-9]+$/))
+ {
+ if(($line[2] == 0) && ($line[4] == 0))
+ {
+ print GREEN, "Copying $line[0].ncd file to workdir\n", RESET;
+ my $c="cp $TOPNAME.dir/$line[0].ncd $TOPNAME.ncd";
+ system($c);
+ print "\n\n";
+ $isSuccess = 1;
+ last;
+ }
+ }
+ }
+
+ if (!$isSuccess){
+ print RED, "\n\n", RESET;
+ print RED, "#################################################\n", RESET;
+ print RED, "# !!!PAR not successfull!!! #\n", RESET;
+ print RED, "#################################################\n\n", RESET;
+ exit 129;
+ }
+ }
+ else
+ {
+ $c=qq|par -w -i 15 -l 5 -y -s 8 -t 1 -c 1 -e 2 -exp parCDP=1:parCDR=1:parPlcInLimit=0:parPlcInNeighborSize=1:parPathBased=ON:parHold=1:parHoldLimit=10000:paruseNBR=1 $tpmap.ncd $TOPNAME.ncd $TOPNAME.prf|;
+ execute($c);
+ my $c="cp $TOPNAME.dir/5_1.ncd $TOPNAME.ncd";
+ system($c);
+ }
+ my $c="cat $TOPNAME.par";
+ system($c);
+
+}
+
+
+if($timing==1 || $all==1){
+ print GREEN, "Generating timing report...\n\n", RESET;
+
+ # IOR IO Timing Report
+ $c=qq|iotiming -s "$TOPNAME.ncd" "$TOPNAME.prf"|;
+ execute($c);
+
+ # TWR Timing Report
+ $c=qq|trce -c -v $twr_number_of_errors -o "$TOPNAME.twr.setup" "$TOPNAME.ncd" "$TOPNAME.prf"|;
+ execute($c);
+
+ $c=qq|trce -hld -c -v $twr_number_of_errors -o "$TOPNAME.twr.hold" "$TOPNAME.ncd" "$TOPNAME.prf"|;
+ execute($c);
+
+ my $c="cat $TOPNAME.par";
+ system($c);
+}
+
+if($bitgen==1 || $all==1){
+ print GREEN, "Generating bit file...\n\n", RESET;
+
+ $c=qq|ltxt2ptxt $TOPNAME.ncd|;
+ execute($c);
+
+ $c=qq|bitgen -w -g CfgMode:Disable -g RamCfg:Reset -g ES:No $TOPNAME.ncd $TOPNAME.bit $TOPNAME.prf|;
+ execute($c);
+}
+
+$c=qq|htmlrpt -mrp $TOPNAME.mrp -mtwr $TOPNAME.twr.hold -ptwr $TOPNAME.twr.setup $TOPNAME|;
+execute($c);
+
+if($config{firefox_open}) {
+ $c=qq|firefox $TOPNAME.html|;
+ execute($c);
+}
+
+chdir "..";
+exit;
+
+sub execute {
+ my ($c, $op) = @_;
+ #print "option: $op \n";
+ $op = "" if(!$op);
+ print GREEN, "\n\ncommand to execute: $c \n", RESET;
+ $r=system($c);
+ if($r) {
+ print "$!";
+ if($op ne "do_not_exit") {
+ exit;
+ }
+ }
+ return $r;
+}
jspc29 / trb3.git / commitdiff