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-\@writefile{lot}{\contentsline {table}{\numberline {1}{\ignorespaces Noise and gain in dependence of the source follower gate size. The uncertainties of the absolute measurements are 5\% for the gain and 10\% for the median noise. The diode size of all pixels listed is $11\nobreakspace {}\rm \upmu m^2$. The width of the gate of all reset transistors is $0.25\nobreakspace {}\rm \upmu m$ and the length is $0.20\nobreakspace {}\rm \upmu m$ (pixel A-C) and $0.30\nobreakspace {}\rm \upmu m$ (pixel D). The source follower transistor of pixel R has an enclosed layout. Note that the gain includes the gain of the external readout chain. Therefore, only the gain of pixels of the same chip can be compared.}}{3}}
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\subsection{Impact of the transistor layout on the sensor performance}
The relation between the charge collection efficiency (CCE), the gain and the median noise of the pixels was measured with MIMOSA-34. All pixels were derived from pixel D and the diode size was varied. Figure \ref{fig:Diodesurface} shows the noise and the gain of the different pixels. Moreover, the CCE representing the most probable fraction of charge collected by the seed pixel of a pixel cluster is shown. For the CCE, only the matrices with the same pitch of $XX\mum$ are comparable. The CCE was measured by means of a $^{55}$Fe-source.
-One observes that the gain is strongly reduced with increasing diode size and the capacitive noise of the pixels raises accordingly. However, this effect comes with an increase in terms of charge collection efficiency, which raises the signal. This is shown in figure \ref{fig:StoNDiodeSize}, which shows the noise, the most probable signal and the S/N as recorded once the sensor was illuminated by $\upbeta$-rays from a $^{90}$Sr-source. One observes that the S/N, which is defined as the most probable signal in the seed pixel divided by the median of the noise distribution, is in the order of 50 and increases slightly with increasing diode pitch despite the increase of the median noise. Once propagating the ``99\%-noise'' to the S/N, one finds that 99\% of all pixels exceeds 22 and no significant impact of the diode pitch is observed. Note that this S/N is sufficient for reliable MIP-detection and remains fairly above the average S/N of our early successful prototypes like MIMOSA-2.
+One observes that the gain is strongly reduced with increasing diode size and the capacitive noise of the pixels raises accordingly. However, this effect comes with an increase in terms of charge collection efficiency, which raises the signal. This is shown in figure \ref{fig:StoNDiodeSize}, which shows the noise, the most probable signal and the S/N as recorded once the sensor was illuminated by $\upbeta$-rays from a $^{90}$Sr-source. One observes that the S/N, which is defined as the most probable signal in the seed pixel divided by the median of the noise distribution, is in the order of 50. Once propagating the ``99\%-noise'' to the S/N, one finds that 99\% of all pixels exceeds 22 and no significant impact of the diode pitch is observed. Note that this S/N is sufficient for reliable MIP-detection and remains fairly above the average S/N of our early successful prototypes like MIMOSA-2.
%TEST
%\section{Experimental setup}
\section{Summary and conclusion}
Aiming for applications like the vertex detectors of CBM and ALICE, we are developing radiation tolerant large scale sensors with an integration time of $\lesssim 30\mus$. A $0.18\mum$ CMOS process providing a high-resistivity epitaxial layer, deep P- and N-wells and potentially a high tolerance to ionizing radiation is considered as a well suited technology for manufacturing those sensors. The process was explored by means of sensor prototypes hosting numerous pixels, which were varied in different key parameters.
-Guided by observations made previously in the field of optical imaging, we studied the relation between sensor capacitance and the RTS - 1/f noise. We find that the use of sensor gates with a length close to the minimum feature size introduces significant RTS-noise into some of the pixels. As the moderate amount of noisy pixels determines the threshold settings on future particle sensor, the advantages of the small gates in terms of reduced capacitance and therefore the improved gain cannot be exploited. Concerning the optimal width of the sensing diode, we find that the increase of noise and of the CCE, which are caused by an increasing diode, do mostly cancel each other out and a very good S/N is reached with diode surfaces scaling from $2 \mum^2$ to $11 \mum^2$. The use of bigger diodes appears slightly preferable.
+Guided by observations made previously in the field of optical imaging, we studied the relation between sensor capacitance and the RTS - 1/f noise. We find that the use of sensor gates with a length close to the minimum feature size introduces significant RTS-noise into some of the pixels. As the moderate amount of noisy pixels determines the threshold settings on future particle sensor, the advantages of the small gates in terms of reduced capacitance and therefore the improved gain cannot be exploited. Concerning the optimal width of the sensing diode, we find that the increase of noise and of the CCE, which are caused by an increasing diode, do mostly cancel each other out and a very good S/N is reached with diode surfaces scaling from $2 \mum^2$ to $11 \mum^2$. %The use of bigger diodes appears slightly preferable.
Concerning the radiation tolerance, we observe that the devices tolerate a dose of $3\Mrad$ without significant losses in the signal to noise ratio, measured with $\rm \beta$-rays while for a dose of $10\Mrad$ a tolerable drop of the gain of the pixels was observed. The origin of this finding is currently under investigation. In any case, the S/N of the device remains satisfactory (above 17 for 99\% of all pixels for the pixel type discussed in this work), which is considered as sufficient for a reliable sensor operation.
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jspc29 / radhard.git / commitdiff