epoch counter bug fix

diff --git a/32PinAddOn/trb3_periph_32PinAddOn.vhd b/32PinAddOn/trb3_periph_32PinAddOn.vhd
index dc829ae2dc11d9e389e001c77e1d09e84f1fe9fc..d69fc7acd829c2fa8b6945991ac01d761c085961 100644 (file)
--- a/32PinAddOn/trb3_periph_32PinAddOn.vhd
+++ b/32PinAddOn/trb3_periph_32PinAddOn.vhd
@@ -731,7 +731,7 @@ begin
 
   THE_TDC : TDC
     generic map (
-      CHANNEL_NUMBER => 5,              -- Number of TDC channels
+      CHANNEL_NUMBER => 65,             -- Number of TDC channels
       CONTROL_REG_NR => 6,              -- Number of control regs - higher than 8 check tdc_ctrl_addr
       TDC_VERSION    => x"160",         -- TDC version number
       DEBUG          => c_YES,
@@ -740,8 +740,8 @@ begin
       RESET                 => reset_i,
       CLK_TDC               => CLK_PCLK_LEFT,  -- Clock used for the time measurement
       CLK_READOUT           => clk_100_i,   -- Clock for the readout
-      REFERENCE_TIME        => timing_trg_received_i,   -- Reference time input
-      HIT_IN                => hit_in_i(4 downto 1),  -- Channel start signals
+      REFERENCE_TIME        => timing_trg_received_i,  -- Reference time input
+      HIT_IN                => hit_in_i(64 downto 1),  -- Channel start signals
       HIT_CALIBRATION       => clk_20_i,    -- Hits for calibrating the TDC
       TRG_WIN_PRE           => tdc_ctrl_reg(42 downto 32),  -- Pre-Trigger window width
       TRG_WIN_POST          => tdc_ctrl_reg(58 downto 48),  -- Post-Trigger window width