changes in reset

diff --git a/gbe_trb/base/inserter.vhd b/gbe_trb/base/inserter.vhd
index f157b1289adb59796d68a1a8803d75b135847a66..727afea1d810a140aaaa518f13983e1b45934508 100644 (file)
--- a/gbe_trb/base/inserter.vhd
+++ b/gbe_trb/base/inserter.vhd
@@ -180,11 +180,11 @@ begin
 \r
   TX_K_OUT  <= '1' when (inject_k = '1') else\r
                '0' when (inject_d = '1') else\r
-               '1' when (rst_int  = '1') else\r
+               '1' when (rst_int  = '1') else -- send bad data when in reset\r
                tx_k_int;\r
   TX_D_OUT  <= x"dc"   when (inject_k = '1') else\r
                payload when (inject_d = '1') else -- payload is here\r
-               x"ee"   when (rst_int  = '1') else\r
+               x"ee"   when (rst_int  = '1') else -- send bad data when in reset\r
                tx_d_int;\r
 \r
 end architecture;\r

diff --git a/gbe_trb_ecp3/media/gbe_med_fifo.vhd b/gbe_trb_ecp3/media/gbe_med_fifo.vhd
index a7358db51e9843781b2937e85e746359c9246179..943104ddb77b371c6340887295f5fa716799caea 100644 (file)
--- a/gbe_trb_ecp3/media/gbe_med_fifo.vhd
+++ b/gbe_trb_ecp3/media/gbe_med_fifo.vhd
@@ -693,7 +693,7 @@ begin
       -- SGMII core
       SGMII_GBE_PCS : sgmii_gbe_pcs42
       port map(
-        rst_n                   => CLEAR_N, --rst_n_sgmii_i(i), --RESET_N,
+        rst_n                   => RESET_N, --CLEAR_N,
         signal_detect           => link_rx_ready(i), --serdes_active(i),
         gbe_mode                => '1',
         sgmii_mode              => '0',
@@ -737,7 +737,7 @@ begin
         mr_an_complete          => open,
         mr_page_rx              => mr_page_rx_i(i), --open,
         mr_lp_adv_ability       => open,
-        mr_main_reset           => CLEAR,
+        mr_main_reset           => RESET, --CLEAR,
         mr_an_enable            => link_rx_ready(i), --'1',
         mr_restart_an           => '0',
         mr_adv_ability          => x"0020"