update

diff --git a/cts.tex b/cts.tex
index c64ddd8ada6b6c76d2c415b9940cd899917ed426..4ce7a566c22ba219f11be1632b7201703097025a 100644 (file)
--- a/cts.tex
+++ b/cts.tex
@@ -8,7 +8,7 @@
 
 Register addresses from 0xA000 to 0xA0ef is SCM FPGA (1) 
 Register addresses from 0xA0f0 to 0xA0ff is ECP2M FPGA (2) 
-Register addresses from 0xA100 to 0xA100 + 10*500 which is number of samples per beam structure, the histograms are created in the SCM FPGA (1) see fig. \ref{ctsbeam}
+Register addresses from 0xA100 to 0xA100 + 26*500 which is number of samples per beam structure, the histograms are created in the SCM FPGA (1) see fig. \ref{ctsbeam}. First 8 is START next 8 is also START but perpendicularstripes. Next 8 is Veto and for the last two the source is selected by 0xA0C2 register.
 
 %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
 \subsection{CTS Control Registers}