input_statistics entity decleration added to the trb3_components package

diff --git a/base/trb3_components.vhd b/base/trb3_components.vhd
index 3b250ce2cca2dc476941f73bd9947a30d2a75e73..75ecbcc8bee49b0d356bc334bdf04c08a6d45c05 100644 (file)
--- a/base/trb3_components.vhd
+++ b/base/trb3_components.vhd
@@ -687,7 +687,22 @@ package trb3_components is
       ADDR_IN    : in  std_logic_vector(15 downto 0) := (others => '0')
       
       );
-  end component;  
+  end component;
+
+  component input_statistics is
+    generic (
+      INPUTS : integer range 1 to 32);
+    port (
+      CLK      : in  std_logic;
+      INPUT    : in  std_logic_vector(INPUTS-1 downto 0);
+      DATA_IN  : in  std_logic_vector(31 downto 0) := (others => '0');
+      DATA_OUT : out std_logic_vector(31 downto 0);
+      WRITE_IN : in  std_logic                     := '0';
+      READ_IN  : in  std_logic                     := '0';
+      ACK_OUT  : out std_logic;
+      NACK_OUT : out std_logic;
+      ADDR_IN  : in  std_logic_vector(15 downto 0) := (others => '0'));
+  end component input_statistics;
 
 
 component serdes_full_ctc is