Updated Slow Control registers.

diff --git a/trb3/TdcSlowControl.tex b/trb3/TdcSlowControl.tex
index 0adc9aaa60b6762a9544efcdc5bc465e30da4ea4..daeccec564bc513bd1ca2404aeae8a9cb5da85f9 100644 (file)
--- a/trb3/TdcSlowControl.tex
+++ b/trb3/TdcSlowControl.tex
@@ -6,7 +6,7 @@ A set of control registers are assigned in order to access the basic controls, e
       \hline
       Address  & \multicolumn{1}{c|}{Name}     & Bits  & \multicolumn{1}{c|}{Explanation}\\
       \hline \hline
-      \multirow{13}{*}{0xc0}   & \multirow{13}{*}{Basic controls}      & 3-0   & Enables different signals to the HPLA* output for debugging with logic analyser (For more details see Table \ref{tab:tdcControlRegBasicLA}).\\
+      \multirow{13}{*}{0xc800} & \multirow{13}{*}{Basic controls}      & 3-0   & Enables different signals to the HPLA* output for debugging with logic analyser (For more details see Table \ref{tab:tdcControlRegBasicLA}).\\
                                &                                       & 4     & Enables the \textit{Debug Mode}. Different statistics and debug words are sent after every trigger (see \ref{sec:tdcDebug}).\\
                                &                                       & 7-5   & reserved.\\
                                 &                                       & 8     & Resets the internal counters.\\
@@ -14,22 +14,23 @@ A set of control registers are assigned in order to access the basic controls, e
                                &                                       & 12    & Used to select the trigger mode. 0 - with trigger mode; 1 - trigger-less mode (For more details see \ref{sec:tdcTrigWin}).\\
                                &                                       & 31-13 & reserved.\\
       \hline
-      \multirow{10}{*}{0xc1}   & \multirow{10}{*}{Trigger window}      & 10-0  & Defines the trigger window width before the trigger with granularity of 5~ns. Minimum value is x"000".\\
+      \multirow{10}{*}{0xc801} & \multirow{10}{*}{Trigger window}      & 10-0  & Defines the trigger window width before the trigger with granularity of 5~ns. Minimum value is x"000".\\
                                &                                       & 15-11 & reserved.\\
                                &                                       & 26-16 & Defines the trigger window width after the trigger with granularity of 5~ns. \textbf{ATTENTION! Minimum value can be set is x"00f".}\\
                                &                                       & 30-27 & reserved.\\
                                &                                       & 31    & Enables trigger window feature.\\
       \hline
 
-      0xc2                     & Channel enable 1                      & 31-0  & Enable signals for the channels 1-32.\\
+      0xc802                   & Channel enable 1                      & 31-0  & Enable signals for the channels 1-32.\\
       \hline
-      0xc3                     & Channel enable 2                      & 31-0  & Enable signals for the channels 33-64.\\
+      0xc803                   & Channel enable 2                      & 31-0  & Enable signals for the channels 33-64.\\
       \hline
-      \multirow{3}{*}{0xc4}    & \multirow{3}{*}{Channel hit scaler control}   & 7-0   & Defines the channel number of the scaler register (Status register 0xc111).\\
+      \multirow{3}{*}{0xc804}  & \multirow{3}{*}{Channel hit scaler control}   & 7-0   & Defines the channel number of the scaler register (Status register 0xc111).\\
                                 &                                       & 31-8  & reserved.\\
       \hline
     \end{tabularx}
-  \caption{The control registers of the TDC.}
+  \caption{The control registers of the TDC. Note that these registers
+  have been moved from 0xc0\ldots0xc4 at the beginning of 2013.}
   \label{tab:tdcControlReg}
   \end{center}
 \end{table}
@@ -66,7 +67,7 @@ A set of control registers are assigned in order to access the basic controls, e
     \end{tabularx}
   \caption{HPLA* output bitmap for different debug modes.}
   \label{tab:tdcControlRegBasicLA}
-  \end{center}  
+  \end{center}
 \end{table}
 
 \begin{table}[htbp]
@@ -97,7 +98,7 @@ A set of control registers are assigned in order to access the basic controls, e
     \end{tabularx}
   \caption{TDC Readout FSM debug word bitmap.}
   \label{tab:tdcReadoutFsm}
-  \end{center}  
+  \end{center}
 \end{table}
 
 \begin{table}[htbp]
@@ -113,7 +114,7 @@ A set of control registers are assigned in order to access the basic controls, e
     \end{tabularx}
   \caption{TDC Reference Channel FSM debug word bitmap.}
   \label{tab:tdcReferenceFsm}
-  \end{center}  
+  \end{center}
 \end{table}
 
 \begin{table}[htbp]
@@ -195,4 +196,8 @@ In order to automatise the threshold level settings the number of hits detected
     \end{tabular}
   \caption{The data format of the \textit{Hit Registers}.}
   \label{tab:tdcHitRegister}
-\end{table}
\ No newline at end of file
+\end{table}
+%%% Local Variables:
+%%% mode: latex
+%%% TeX-master: "main"
+%%% End: