redundancy, mt

diff --git a/trb3/Trb3GeneralRemarks.tex b/trb3/Trb3GeneralRemarks.tex
index f330884b1984cda9ce58dff8c3540155d8a62e9b..76002fc6eb9b0e025823c555ad5edd89cd5d63c3 100644 (file)
--- a/trb3/Trb3GeneralRemarks.tex
+++ b/trb3/Trb3GeneralRemarks.tex
@@ -1,3 +1,12 @@
+\subsection{Beam Time Preparations}
+For a beam time, please be aware, that everything can happen! Any sorts of non
+experienced failures happen according to Murphy always when you really don't
+need them :-)...
+So, please don't go to a beam time with {\bf one} TRB3 and no replacement module and
+always be sure that you have a Lattice Download Cable available to reflash the
+TRB3 if something goes wrong in the fever of a beam time.
+
+
 \subsection{Hardware Information}
 \begin{itemize*}
  \item Schematics \href{http://hades-wiki.gsi.de/pub/DaqSlowControl/TDCReadoutBoardV3/trbv3_SCHEMATIC_michael.pdf}{trbv3\_SCHEMATIC\_michael.pdf}
@@ -6,7 +15,6 @@
 \end{itemize*}
 
 
-
 \subsection{Board Identification}
 \label{Trb3BoardID}
 The TRB3 boards are equipped with 5 temperature sensors, one for each FPGA. They contain a unique ID that is used to identify each FPGA. Additionally, the peripheral FPGAs have to bits identification (endpoint ID) corresponding to their position on the board.