change reboot code to prevent race condition between timer and external reset

diff --git a/special/fpga_reboot.vhd b/special/fpga_reboot.vhd
index ffa7d79eb262ba3eade9f746ba65926fa64bb0ea..851d9d5cbd1f061dcaf142dc60542bae875dc181 100644 (file)
--- a/special/fpga_reboot.vhd
+++ b/special/fpga_reboot.vhd
@@ -19,13 +19,15 @@ architecture fpga_reboot_arch of fpga_reboot is
 
   signal delayed_restart_fpga : std_logic := '0';
   signal restart_fpga_counter : unsigned(11 downto 0);  
-
+  signal last_reset : std_logic := '0';
 begin
 
 PROC_REBOOT : process
   begin
     wait until rising_edge(CLK);
-    if RESET = '1' then
+    last_reset <= RESET;
+    
+    if RESET = '0' and last_reset = '1' then
       delayed_restart_fpga   <= REBOOT_ON_RESET;
       restart_fpga_counter   <= x"000";
     else
@@ -35,7 +37,7 @@ PROC_REBOOT : process
         restart_fpga_counter   <= x"001";
       elsif restart_fpga_counter /= x"000" then
         restart_fpga_counter   <= restart_fpga_counter + 1;
-        if restart_fpga_counter >= x"800" then
+        if restart_fpga_counter >= x"a00" then
           PREPARE_FOR_RELOAD <= '1';
         end if;
         if restart_fpga_counter >= x"F00" then