corrected hex/dec values

diff --git a/soft/toolbox/jtag_atomic/ui.pl b/soft/toolbox/jtag_atomic/ui.pl
index e0ca209ca891f0812747191d0ec7522a7ff2e5df..f43b9ec5cfcdf961b036014dcf7a0eaa0394e0f3 100755 (executable)
--- a/soft/toolbox/jtag_atomic/ui.pl
+++ b/soft/toolbox/jtag_atomic/ui.pl
@@ -181,15 +181,15 @@ foreach my $board (keys %allboards) {
   my $trbhostname = $settings{'FPGAboard_hostname'};
   my $addonortrb = $settings{'FPGAboard_addonortrb'};
   my $staplfilename = $settings{'FPGAboard_staplfilename'};
-  my $fpga_addr = $settings{'FPGAtrbnetAddr'};
-  my $conf_period_addr = $settings{'CONFperiod_trbnetAddr'};
-  my $conf_offspillcounter_addr = $settings{'CONFoffspillcounter_trbnetAddr'};
-  my $conf_waitstart_addr = $settings{'CONFwaitstart_trbnetAddr'};
-  my $conf_triginitseq_addr = $settings{'CONFtriginitseq_trbnetAddr'};
-  my $conf_trigmapsreset_addr = $settings{'CONFtrigmapsreset_trbnetAddr'};
-  my $conf_trigrunjtag_addr = $settings{'CONFtrigrunjtag_trbnetAddr'};
-  my $conf_trigwriteonce_addr = $settings{'CONFtrigwriteonce_trbnetAddr'};
-  my $conf_trigmapsstart_addr = $settings{'CONFtrigmapsstart_trbnetAddr'};
+  my $fpga_addr = any2dec($settings{'FPGAtrbnetAddr'});
+  my $conf_period_addr = any2dec($settings{'CONFperiod_trbnetAddr'});
+  my $conf_offspillcounter_addr = any2dec($settings{'CONFoffspillcounter_trbnetAddr'});
+  my $conf_waitstart_addr = any2dec($settings{'CONFwaitstart_trbnetAddr'});
+  my $conf_triginitseq_addr = any2dec($settings{'CONFtriginitseq_trbnetAddr'});
+  my $conf_trigmapsreset_addr = any2dec($settings{'CONFtrigmapsreset_trbnetAddr'});
+  my $conf_trigrunjtag_addr = any2dec($settings{'CONFtrigrunjtag_trbnetAddr'});
+  my $conf_trigwriteonce_addr = any2dec($settings{'CONFtrigwriteonce_trbnetAddr'});
+  my $conf_trigmapsstart_addr = any2dec($settings{'CONFtrigmapsstart_trbnetAddr'});
 
 
   if(defined($opt_board) and not defined($opt_chain)) {
@@ -225,8 +225,10 @@ foreach my $board (keys %allboards) {
     elsif(("h_".$opt_operation) eq   'h_maps_start' ) {
       $subr =  generate_h_trig($board, $fpga_addr, $conf_trigmapsstart_addr);
     }
-    if(!defined($opt_quiet)){ print "Starting Board Operation.\n"; }
-    &{$subr}();
+    unless ($subr==1) {
+      if(!defined($opt_quiet)){ print "Starting Board Operation.\n"; }
+      &{$subr}();    
+      }
     exit(0);
   }
     
@@ -237,23 +239,23 @@ $chainsini = $ENV{'JTAGCONFIGPATH'}."/".$chainsini if exists($ENV{'JTAGCONFIGPAT
 #  foreach my $chain (reverse sort keys %allchains) {
     my $chain = $opt_chain;
     my %chain_settings=%{$allchains{$chain}};
-    my $chain_fpga_addr = $chain_settings{'FPGAtrbnetAddr'};
-    my $ram_addr  = $chain_settings{'RAMtrbnetAddr'};
-    my $cmd_reg_addr = $chain_settings{'CMDreg_trbnetAddr'};
-    my $ram_base_addr  = $chain_settings{'RAMbase_trbnetAddr'};
-    my $data_reg_addr = $chain_settings{'DATAreg_trbnetAddr'};
-    my $conf_signals_addr = $chain_settings{'CONFsignals_trbnetAddr'};
-    my $conf_resetafterfirstwrite_addr = $chain_settings{'CONFresetafterfirstwrite_trbnetAddr'};
-    my $conf_resetbeforeinit_addr = $chain_settings{'CONFresetbeforeinit_trbnetAddr'};
-    my $conf_chain_triginitseq_addr = $chain_settings{'CONFtriginitseq_trbnetAddr'};
-    my $conf_chain_trigmapsreset_addr = $chain_settings{'CONFtrigmapsreset_trbnetAddr'};
-    my $conf_chain_trigrunjtag_addr = $chain_settings{'CONFtrigrunjtag_trbnetAddr'};
-    my $conf_chain_trigwriteonce_addr = $chain_settings{'CONFtrigwriteonce_trbnetAddr'};
-    my $conf_chain_trigmapsstart_addr = $chain_settings{'CONFtrigmapsstart_trbnetAddr'};  
-    my $debug_chain_ram1baddr_addr = $chain_settings{'DEBUGram1baddr'};  
-    my $debug_chain_ram1bdata_addr = $chain_settings{'DEBUGram1bdata'};  
-    my $debug_chain_ram1caddr_addr = $chain_settings{'DEBUGram1caddr'};  
-    my $debug_chain_ram1cdata_addr = $chain_settings{'DEBUGram1cdata'};  
+    my $chain_fpga_addr = any2dec($chain_settings{'FPGAtrbnetAddr'});
+    my $ram_addr  = any2dec($chain_settings{'RAMtrbnetAddr'});
+    my $cmd_reg_addr = any2dec($chain_settings{'CMDreg_trbnetAddr'});
+    my $ram_base_addr  = any2dec($chain_settings{'RAMbase_trbnetAddr'});
+    my $data_reg_addr = any2dec($chain_settings{'DATAreg_trbnetAddr'});
+    my $conf_signals_addr = any2dec($chain_settings{'CONFsignals_trbnetAddr'});
+    my $conf_resetafterfirstwrite_addr = any2dec($chain_settings{'CONFresetafterfirstwrite_trbnetAddr'});
+    my $conf_resetbeforeinit_addr = any2dec($chain_settings{'CONFresetbeforeinit_trbnetAddr'});
+    my $conf_chain_triginitseq_addr = any2dec($chain_settings{'CONFtriginitseq_trbnetAddr'});
+    my $conf_chain_trigmapsreset_addr = any2dec($chain_settings{'CONFtrigmapsreset_trbnetAddr'});
+    my $conf_chain_trigrunjtag_addr = any2dec($chain_settings{'CONFtrigrunjtag_trbnetAddr'});
+    my $conf_chain_trigwriteonce_addr = any2dec($chain_settings{'CONFtrigwriteonce_trbnetAddr'});
+    my $conf_chain_trigmapsstart_addr = any2dec($chain_settings{'CONFtrigmapsstart_trbnetAddr'});  
+    my $debug_chain_ram1baddr_addr = any2dec($chain_settings{'DEBUGram1baddr'});  
+    my $debug_chain_ram1bdata_addr = any2dec($chain_settings{'DEBUGram1bdata'});  
+    my $debug_chain_ram1caddr_addr = any2dec($chain_settings{'DEBUGram1caddr'});  
+    my $debug_chain_ram1cdata_addr = any2dec($chain_settings{'DEBUGram1cdata'});  
     my $chainnr = $chain_settings{'chainnr'};
     my $subr;
     if(("h_".$opt_operation) eq  'h_man_maps_reset') {
@@ -329,7 +331,9 @@ $chainsini = $ENV{'JTAGCONFIGPATH'}."/".$chainsini if exists($ENV{'JTAGCONFIGPAT
         $subr =  generate_h_copy_ram1b1c($chain, $chain_fpga_addr, $cmd_reg_addr, $data_reg_addr);
     }
     
-    if(!defined($opt_quiet)){ print "Starting Chain Operation.\n"; }
-    &{$subr}();    
+    unless ($subr==1) {
+      if(!defined($opt_quiet)){ print "Starting Chain Operation.\n"; }
+      &{$subr}();    
+      }
   
 }

diff --git a/soft/toolbox/jtag_atomic/ui_generators.pl b/soft/toolbox/jtag_atomic/ui_generators.pl
index 0e29d69e2e3ec6c00d92f6b9b556fc71631fc832..4ac6d002e0022d22a0f3bb8af7deb99ac6966a3e 100644 (file)
--- a/soft/toolbox/jtag_atomic/ui_generators.pl
+++ b/soft/toolbox/jtag_atomic/ui_generators.pl
@@ -1,10 +1,23 @@
 #Send a command that writes data
 sub send_write_command {
   my ($fpga, $dreg, $creg, $val, $cmd) = @_;
-  trb_register_write($fpga, $dreg, $val);
-  trb_register_write($fpga, $creg, $cmd);
+  print "Sending commands";
+  trb_register_write($fpga, $dreg, $val) or die trb_strerror();
+  trb_register_write($fpga, $creg, $cmd) or die trb_strerror();
+  print "done";
   }
   
+sub any2dec { # converts numeric expressions 0x, 0b or decimal to decimal
+  
+  my $argument = $_[0];
+  #print "any2dec input argument $argument\n";  
+
+  if ( $argument =~ m/0[bxBX]/) { 
+    return oct $argument;
+  } else {
+    return $argument;
+  }
+}
   
 
 sub generate_h_read_ram1b_word {
@@ -35,8 +48,7 @@ sub generate_h_copy_ram1b1c {
   my ($chain, $fpga_addr, $cmd_reg_addr, $data_reg_addr, $addr) = @_;
   return sub {
     init_msg( "read ram1b word " . $chain);
-    execute_shell_command("trbcmd w $fpga_addr $data_reg_addr 0x00000008", ""); # unconditional trigger
-    execute_shell_command("trbcmd w $fpga_addr $cmd_reg_addr 0x00000064", ""); # M26C_CMD_COPY_RAM1B1C_SINGLE_TRIGGER
+    send_write_command($fpga_addr,$data_reg_addr,$cmd_reg_addr,0x00000008,0x00000064); #M26C_CMD_COPY_RAM1B1C_SINGLE_TRIGGER with unconditional trigger
   }
 }
 
@@ -48,13 +60,13 @@ sub generate_h_man_maps_reset {
     # set signals_invert bit 10 (reset inverted) temporarily to generate a manual reset
     my $regval = execute_shell_command_return("trbcmd r $fpga_addr $conf_signals_addr");
     reportd "regval: ". substr($regval, 8, 10). "\n";
-    my $resetnormal = substr($regval, 8, 10);
+    my $resetnormal = hex(substr($regval, 8, 10));
 #    my $resetinv = int_to_32bit_hex((~(0b10000000000)) & hex_to_32bit_int($resetnormal));
     my $resetinv = (~(1<< 10)) & hex($resetnormal);
-    execute_shell_command("trbcmd w $fpga_addr $conf_signals_addr 0x$resetinv 2>&1 && sleep 1 && trbcmd w $fpga_addr $conf_signals_addr $resetnormal 2>&1", "");
+#     execute_shell_command("trbcmd w $fpga_addr $conf_signals_addr 0x$resetinv 2>&1 && sleep 1 && trbcmd w $fpga_addr $conf_signals_addr $resetnormal 2>&1", "");
     trb_register_write($fpga_addr, $conf_signals_addr,$resetinv);
     sleep 1;
-    trb_register_write($fpga_addr, $conf_signals_addr,hex($resetnormal));
+    trb_register_write($fpga_addr, $conf_signals_addr,$resetnormal);
   }
 }
 
@@ -156,10 +168,10 @@ sub generate_h_set_timing_100khz {
 
 sub generate_h_delay {
   my($chain, $fpga_addr, $cmd_reg_addr, $data_reg_addr, $delay) =  @_;
-  return sub {
+#   return sub {
     init_msg("Delay $delay $chain.");
     send_write_command($fpga_addr,$data_reg_addr,$cmd_reg_addr,$delay,0x00000067);
-  }
+#   }
 }
 
 sub generate_h_waitbeforestart_6us {