attilio: ajust bug in token back

diff --git a/design/mdc_addon_daq_bus_0.vhd b/design/mdc_addon_daq_bus_0.vhd
index c5219dd1f9b987d48848ed519a704f57835639f1..76ab51e0a1d83be760ab1df20edcbaf4358f7e39 100644 (file)
--- a/design/mdc_addon_daq_bus_0.vhd
+++ b/design/mdc_addon_daq_bus_0.vhd
@@ -371,23 +371,16 @@ begin  --behavioral
       INIT_TDC_READOUT_IN   => init_tdc_readout_i,
 
       DATA_TYPE_SELECT_IN   => DATA_TYPE_SELECT_IN,
-      -- INIT_TRB_INTERFACE_IN => init_trb_interface_i,
       TOKEN_TO_TRB_OUT      => token_to_trb_i,
       REINIT_ROC1_IN        => reinit_roc1_i,
       REINIT_ROC1_OUT       => reinit_roc1_forwarded_i,
       SUCCESFUL_REINIT_ROC1 => succesful_reinit_roc1_i,
       STOP_READOUT_IN       => stop_readout_i,
-     -- DATA_BUS_TO_TRB_OUT   => DATA_BUS_TO_TRB_OUT,
-    --  DATA_VALID_TO_TRB_OUT => DATA_VALID_TO_TRB_OUT,
+
       DEBUG_REGISTER_0      => DEBUG_REGISTER_0_BUS_0,
       DEBUG_REGISTER_1      => DEBUG_REGISTER_1_BUS_0,
       DEBUG_REGISTER_2      => DEBUG_REGISTER_2_BUS_0,
 -- trb interface
---       ACKNOWLEDGE_TRB_INTERFACE_IN => ACKNOWLEDGE_TRB_INTERFACE_IN,
---       INIT_TRB_INTERFACE_OUT => INIT_TRB_INTERFACE_OUT,
---       DATA_OUT => DATA_OUT,
---       READ_FIFO_IN => READ_FIFO_IN,
---       DEBUG_REGISTER_TRB_INTERFACE => DEBUG_REGISTER_TRB_INTERFACE
       LVL1_TRG_TYPE_IN         => LVL1_TRG_TYPE_IN,
       LVL1_TRG_RECEIVED_IN     => LVL1_TRG_RECEIVED_IN,
       LVL1_TRG_NUMBER_IN       => LVL1_TRG_NUMBER_IN,
@@ -441,10 +434,8 @@ begin  --behavioral
   A_ENR_2           <= '1';             --common stop enable
   A_DRB_2           <= '1';             --A_RDM enable
   A_DRA             <= '0';             --A_ACK enable
--------------------------------------------------------------------------------
-
---   reset_i <= ADO_TTL_IN(0);
 
+  
   A_GDE      <= a_gde_i;
   A_RES      <= a_res_i;
   A_TOK      <= a_tok_i;
@@ -455,8 +446,6 @@ begin  --behavioral
   a_reserv_i <= A_RESERV;               --this is 11 bit of dataword
 
   A_CMS      <= a_cms_out_i;            --common stop
---  A_RDO_OUT <= token_to_trb_i;
-
 
 end behavioral;
 

diff --git a/design/tdc_readout.vhd b/design/tdc_readout.vhd
index bfb37e5d0e4fe0110989e5664399e61564730b94..14c386bed422c051201c068bdeed555fd4747b3c 100644 (file)
--- a/design/tdc_readout.vhd
+++ b/design/tdc_readout.vhd
@@ -133,7 +133,8 @@ begin  -- behavioral
  REGISTER_OUTPUT : process (CLK, reg_data_type_select_in) 
   begin
     if rising_edge(CLK) then
-      if (RESET = '1' or reg_data_type_select_in = x"1") then
+      if (RESET = '1' or reg_data_type_select_in = x"1" or
+          reg_data_type_select_in = x"2") then
         current_state <= idle_state;
         reg_data_bus_out <= (others => '0');
         reg_data_valid_out <= '0';
@@ -337,7 +338,7 @@ begin  -- behavioral
 -------------------------------------------------------------------------------
 -- DATA SELECT MULTIPLEXER
 -------------------------------------------------------------------------------
-   process (CLK, reg_data_type_select_in)
+   process (CLK, reg_data_type_select_in(3 downto 0))
    begin
      if (rising_edge(CLK)) then
        if (reg_data_type_select_in = x"0") then  --debug mode
@@ -1038,7 +1039,8 @@ begin  -- behavioral
  process (CLK) 
   begin
     if rising_edge(CLK) then
-      if (RESET = '1') then
+      if (RESET = '1' or reg_data_type_select_in = x"0" or
+          reg_data_type_select_in = x"1") then
         current_state_test_data <= idle_state_test_data;
         reg_data_bus_out_test_data <= (others => '0');
         reg_data_valid_out_test_data <= '0';
@@ -1059,9 +1061,6 @@ begin  -- behavioral
 -------------------------------------------------------------------------------
  process(current_state_test_data, INIT_TDC_READOUT_IN, counter_test_data)
    
---   variable index : integer range 0 to conv_integer(reg_test_data_maximun_word_number);
---std_logic_vector (19 downto 0);   
-
  begin  
  
    next_data_valid_out_test_data <= '0';
@@ -1102,7 +1101,7 @@ begin  -- behavioral
      when check_dataword_number_test_data =>
           next_debug_register_test_data <= x"3";
           next_data_valid_out_test_data <= '0';
-       next_data_bus_out_test_data(15 downto 0) <= std_logic_vector(TO_UNSIGNED(conv_integer(counter_test_data), reg_test_data_maximun_word_number'Length));       
+          next_data_bus_out_test_data(15 downto 0) <= std_logic_vector(TO_UNSIGNED(conv_integer(counter_test_data), reg_test_data_maximun_word_number'Length));       
           if (conv_integer(counter_test_data) >= reg_test_data_maximun_word_number) then
             next_state_test_data <= send_token_state_test_data;
          else

diff --git a/design/tdc_readout_and_trb_interface.vhd b/design/tdc_readout_and_trb_interface.vhd
index c4cad1ff084daf272e0e667a121479faa25709e8..fbfa3996a6b1c8ced61deb481ba2863851b2c376 100644 (file)
--- a/design/tdc_readout_and_trb_interface.vhd
+++ b/design/tdc_readout_and_trb_interface.vhd
@@ -534,7 +534,7 @@ end process;
 
 --test in case no data in fifo (ok if I don't buffer many events)
 --set the 18th bit if fifo data is empty
-   IPU_ERROR_PATTERN_OUT <= x"000" & "0100" & x"0000" when (empty_flag_fee_data_fifo_i = '1') else (others => '0');--reg_ipu_error_pattern;
+   IPU_ERROR_PATTERN_OUT <= x"000" & "0000" & x"0000"; --when (empty_flag_fee_data_fifo_i = '1') else (others => '0');--reg_ipu_error_pattern;
 
 
 -- Count number of dataword per event
@@ -780,9 +780,10 @@ end process;
         next_ipu_data_ready <= '0';
         next_data_to_trb_net <= header_data_fifo_out_i(31 downto 0);
 --here I wait only when the first token from the first event is back
---in fiture I need to see there is one event at least in the header fifo
-        if (conv_integer(counter_token_back) >= 1) then
-         -- push_read_header_data_i <= '1';
+--in future I need to see there is one event at least in the header fifo
+--check if header is in the header fifo
+        if (empty_flag_header_data_fifo_i = '1') then
+        --if (conv_integer(counter_token_back) >= 1) then
           next_state_fsm_multiplexer <= dummy_wait_4_fsm_multiplexer;
         else
           next_state_fsm_multiplexer <= wait_for_complete_event_fsm_multiplexer;
@@ -847,6 +848,7 @@ end process;
           else
             next_state_fsm_multiplexer <= send_data_state_fsm_multiplexer;
           end if;
+        
   --stay if no tok back and fifo empty for 
       when end_of_event_transfer_fsm_multiplexer =>
         next_debug_register_fsm_multiplexer <= x"07";
@@ -961,7 +963,7 @@ process (CLK)
  begin
    if rising_edge(CLK) then
      if RESET = '1' then
-       reg_first_header <= (others => '0');
+       reg_first_header<= (others => '0');
      else
        reg_first_header <= first_header;
      end if;