-------------------------------------------------------------------------------
-- Attilio Tarantola
--- Create Date: 01/02/2007
+-- Create Date: 01/02/2007
-- Description: this entity initializes trigger_handle_tld.
-- It controls if ROC1 has been written correctly after trigger begrun
-- This entity receive the request of data from the TRB and distribute the
-- use UNISIM.VComponents.all;
entity common_stop_generator is
- generic (width : integer := 5);
+ generic (width : integer := 5);
port(
CLK : in std_logic;
RESET : in std_logic;
- A_CMS_OUT : out std_logic; --common stop to all buses
+ A_CMS_OUT : out std_logic; --common stop to all buses
A_RDO_IN : in std_logic; --ready FROM first motherboard
TRIGGER_TYPE_IN : in std_logic_vector(3 downto 0); -- I use 4 bit for trigger
ROC1_WRITTEN_IN : in std_logic;
CAL1_WRITTEN_IN : in std_logic;
-
+
ENABLE_MODE_LINE_OUT : out std_logic_vector(3 downto 0);
ENABLE_A_ADD_DATA_OUT : out std_logic --'1'(mdc_addon to MBs)
);
-- TOKEN_TO_TRB <= reg_token_to_trb;
A_CMS_OUT <= reg_a_cms;
-
- INIT_TDC_READOUT_OUT <= reg_init_tdc_readout;
+
+ INIT_TDC_READOUT_OUT <= reg_init_tdc_readout;
INIT_TRIGGER_HANDLE_TLD_OUT <= reg_init_trigger_handle_tld_i;
ENABLE_A_ADD_DATA_OUT <= reg_enable_a_add_data_i;
end if;
-------------------------------------------------------------------------------
-- BEGRUN TRIGGER
--------------------------------------------------------------------------------
+-------------------------------------------------------------------------------
when begrun_trigger_out_state =>
--DEBUG_REGISTER <= "100";
reset_all_counters <= '0';
next_enable_mode_line <= x"D";
next_enable_a_add_data_i <= '1'; --mux for config. (mdc_addon to MBs)
if ROC1_WRITTEN_IN = '1' then
- next_token_to_trb <= '1'; --token to trb simulated:)
+ next_token_to_trb <= '1'; --token to trb simulated:)
next_state <= roc1_written_state;
else
next_state <= wait_roc1_written;
-------------------------------------------------------------------------------
when calibration_trigger_state => --here like begrun
next_enable_mode_line <= x"D";
- next_enable_a_add_data_i <= '1';
+ next_enable_a_add_data_i <= '1';
next_init_trigger_handle_tld_i <= x"2"; --start calibration
next_state <= wait_cal1_written;
- when wait_cal1_written =>
+ when wait_cal1_written =>
next_enable_mode_line <= x"D";
next_enable_a_add_data_i <= '1';
-- CAL1_WRITTEN = '1' means the CAL1 has been loaded and I can start the
-- next_init_trb_interface_i <= '0';
next_state <= calibration_readout_3;
-- if time_counter_1 > "0000000000011111" then -- time_limit then
--- next_state <= calibration_readout_3;
+-- next_state <= calibration_readout_3;
-- else
--- next_state <= calibration_readout_2;
+-- next_state <= calibration_readout_2;
-- end if;
when calibration_readout_3 =>
reset_all_counters <= '0';
next_a_cms <= '0';
next_enable_mode_line <= x"1";
- if A_RDO_IN = '1' then
+ if A_RDO_IN = '1' then
next_state <= idle_state;
else
next_state <= calibration_readout_3;
end process;
-------------------------------------------------------------------------------
--counter used in wait_state: delay between CMS and token
--------------------------------------------------------------------------------
+-------------------------------------------------------------------------------
process (CLK)
begin
if rising_edge(CLK) then