entity trb_net16_obuf is
generic (
+ USE_ACKNOWLEDGE : integer range 0 to 1 := 1;
+ CAN_SEND_DATA : integer range 0 to 1 := 1;
DATA_COUNT_WIDTH : integer range 1 to 7 := 5 -- max used buffer size is 2**DATA_COUNT_WIDTH.
);
port(
signal transfer_counter : std_logic_vector(1 downto 0);
signal saved_packet_type : std_logic_vector(2 downto 0);
-
+ signal reg_SEND_ACK_IN_2,next_SEND_ACK_IN_2 : std_logic;
+
begin
SBUF: trb_net16_sbuf
SYN_READ_IN => MED_READ_IN
);
- decrease_TRANSMITTED_BUFFERS <= GOT_ACK_IN;
comb_read <= '1';
INT_READ_OUT <= reg_INT_READ_OUT;
sbuf_free <= comb_next_read;
- send_ACK <= SEND_ACK_IN or reg_SEND_ACK_IN;
- send_DATA <= not TRANSMITTED_BUFFERS(1);--'1' when (TRANSMITTED_BUFFERS(1) = '0') else '0';
-
- --only for full obuf
- send_EOB <= '1' when (CURRENT_DATA_COUNT = max_DATA_COUNT_minus_one) else '0';
-
-
- -- buffer registers
- STAT_BUFFER(1 downto 0) <= TRANSMITTED_BUFFERS;
- STAT_BUFFER(14 downto 2) <= (others => '0');
- STAT_BUFFER(15) <= send_DATA;
- STAT_BUFFER(20 downto 16) <= CURRENT_DATA_COUNT;
- STAT_BUFFER(31 downto 21) <= (others => '0');
- SEND_BUFFER_SIZE_IN <= CTRL_BUFFER(3 downto 0);
- REC_BUFFER_SIZE_IN <= CTRL_BUFFER(7 downto 4);
- SEND_ACK_IN <= CTRL_BUFFER(8);
- GOT_ACK_IN <= CTRL_BUFFER(9);
-
-
+ gen1 : if USE_ACKNOWLEDGE = 1 generate
+ decrease_TRANSMITTED_BUFFERS <= GOT_ACK_IN;
+ send_ACK <= SEND_ACK_IN or reg_SEND_ACK_IN or reg_SEND_ACK_IN_2;
+ next_SEND_ACK_IN_2 <= (reg_SEND_ACK_IN_2 or SEND_ACK_IN) and reg_SEND_ACK_IN;
+ send_DATA <= not TRANSMITTED_BUFFERS(1);--'1' when (TRANSMITTED_BUFFERS(1) = '0') else '0';
+
+ --only for full obuf
+ send_EOB <= '1' when (CURRENT_DATA_COUNT = max_DATA_COUNT_minus_one) else '0';
+
+
+ -- buffer registers
+ STAT_BUFFER(1 downto 0) <= TRANSMITTED_BUFFERS;
+ STAT_BUFFER(14 downto 2) <= (others => '0');
+ STAT_BUFFER(15) <= send_DATA;
+ STAT_BUFFER(20 downto 16) <= CURRENT_DATA_COUNT;
+ STAT_BUFFER(31 downto 21) <= (others => '0');
+ SEND_BUFFER_SIZE_IN <= CTRL_BUFFER(3 downto 0);
+ REC_BUFFER_SIZE_IN <= CTRL_BUFFER(7 downto 4);
+ SEND_ACK_IN <= CTRL_BUFFER(8);
+ GOT_ACK_IN <= CTRL_BUFFER(9);
+ end generate;
+ gen1a : if USE_ACKNOWLEDGE = 0 generate
+ send_EOB <= '0';
+ send_ACK <= '0';
+ reg_SEND_ACK_IN <= '0';
+ reg_SEND_ACK_IN_2 <= '0';
+ send_DATA <= '1';
+ got_locked <= '0';
+ release_locked <= '0';
+ is_locked <= '0';
+ CURRENT_DATA_COUNT <= (others => '0');
+ max_DATA_COUNT_minus_one <= (others => '0');
+ next_max_DATA_COUNT_minus_one <= (others => '0');
+ next_TRANSMITTED_BUFFERS <= (others => '0');
+
+ end generate;
GENERATE_WORDS : process(transfer_counter, SEND_BUFFER_SIZE_IN, INT_DATA_IN)
begin
next_INT_READ_OUT <= '1';
increase_TRANSMITTED_BUFFERS <= '0';
next_DATA_COUNT <= CURRENT_DATA_COUNT;
- next_SEND_ACK_IN <= send_ACK; --BUGBUG: next_SEND_ACK_IN should be a counter (2 may arrive)
- -- -> no real problem due to same speed of transmission
+ next_SEND_ACK_IN <= send_ACK;
comb_dataready <= '0';
if (reg_INT_READ_OUT = '1' and INT_DATAREADY_IN = '1') then
end process;
-
- REG : process(CLK)
+ REG1 : process(CLK)
begin
if rising_edge(CLK) then
if RESET = '1' then
- reg_SEND_ACK_IN <= '0';
- CURRENT_DATA_COUNT <= (others => '0');
reg_INT_READ_OUT <= '0';
elsif CLK_EN = '1' then
- reg_SEND_ACK_IN <= next_SEND_ACK_IN;
- CURRENT_DATA_COUNT <= next_DATA_COUNT;
reg_INT_READ_OUT <= next_INT_READ_OUT;
end if;
end if;
end process;
- next_max_DATA_COUNT_minus_one <=
- conv_std_logic_vector(3, DATA_COUNT_WIDTH) when REC_BUFFER_SIZE_IN="0010" else
- conv_std_logic_vector(7, DATA_COUNT_WIDTH) when REC_BUFFER_SIZE_IN="0011" else
- (others => '1') when REC_BUFFER_SIZE_IN(3 downto 1)="011" else --this is bram or infty
- conv_std_logic_vector(1, DATA_COUNT_WIDTH);
+ gen3 : if USE_ACKNOWLEDGE = 0 generate
+ STAT_BUFFER <= (others => '0');
+ STAT_LOCKED <= (others => '0');
+ TRANSMITTED_BUFFERS <= (others => '0');
+ end generate;
+
+ gen2 : if USE_ACKNOWLEDGE = 1 generate
+ REG : process(CLK)
+ begin
+ if rising_edge(CLK) then
+ if RESET = '1' then
+ reg_SEND_ACK_IN <= '0';
+ reg_SEND_ACK_IN_2 <= '0';
+ CURRENT_DATA_COUNT <= (others => '0');
+ elsif CLK_EN = '1' then
+ reg_SEND_ACK_IN <= next_SEND_ACK_IN;
+ reg_SEND_ACK_IN_2 <= next_SEND_ACK_IN_2;
+ CURRENT_DATA_COUNT <= next_DATA_COUNT;
+ end if;
+ end if;
+ end process;
+
+ next_max_DATA_COUNT_minus_one <=
+ conv_std_logic_vector(3, DATA_COUNT_WIDTH) when REC_BUFFER_SIZE_IN="0010" else
+ conv_std_logic_vector(7, DATA_COUNT_WIDTH) when REC_BUFFER_SIZE_IN="0011" else
+ (others => '1') when REC_BUFFER_SIZE_IN(3 downto 1)="011" else --this is bram or infty
+ conv_std_logic_vector(1, DATA_COUNT_WIDTH);
+
+ reg_max_DATA_COUNT : process(CLK)
+ begin
+ if rising_edge(CLK) then
+ if RESET = '1' then
+ max_DATA_COUNT_minus_one(0) <= '1';
+ max_DATA_COUNT_minus_one(DATA_COUNT_WIDTH-1 downto 1) <= (others => '0');
+ else
+ max_DATA_COUNT_minus_one <= next_max_DATA_COUNT_minus_one(DATA_COUNT_WIDTH-1 downto 0);
+ end if;
+ end if;
+ end process;
- reg_max_DATA_COUNT : process(CLK)
+ comb_TRANSMITTED_BUFFERS : process (increase_TRANSMITTED_BUFFERS, decrease_TRANSMITTED_BUFFERS, TRANSMITTED_BUFFERS)
begin
- if rising_edge(CLK) then
- if RESET = '1' then
- max_DATA_COUNT_minus_one(0) <= '1';
- max_DATA_COUNT_minus_one(DATA_COUNT_WIDTH-1 downto 1) <= (others => '0');
+ if (increase_TRANSMITTED_BUFFERS = '1' and decrease_TRANSMITTED_BUFFERS = '0') then
+ next_TRANSMITTED_BUFFERS <= TRANSMITTED_BUFFERS +1;
+ elsif (increase_TRANSMITTED_BUFFERS = '0' and decrease_TRANSMITTED_BUFFERS = '1') then
+ next_TRANSMITTED_BUFFERS <= TRANSMITTED_BUFFERS -1;
else
- max_DATA_COUNT_minus_one <= next_max_DATA_COUNT_minus_one(DATA_COUNT_WIDTH-1 downto 0);
+ next_TRANSMITTED_BUFFERS <= TRANSMITTED_BUFFERS;
end if;
- end if;
- end process;
+ end process;
+
+ reg_TRANSMITTED_BUFFERS : process(CLK)
+ begin
+ if rising_edge(CLK) then
+ if RESET = '1' then
+ TRANSMITTED_BUFFERS <= "00";
+ elsif CLK_EN = '1' then
+ TRANSMITTED_BUFFERS <= next_TRANSMITTED_BUFFERS;
+ end if;
+ end if;
+ end process;
+
+ comb_locked : process (MED_READ_IN, saved_packet_type, transfer_counter, release_locked, is_locked)
+ begin -- process
+ got_locked <= is_locked and not release_locked;
+ if MED_READ_IN = '1' then
+ if saved_packet_type = TYPE_TRM and transfer_counter = "11" and release_locked = '0' then
+ got_locked <= '1';
+ end if;
+ end if;
+ end process;
+
+ release_locked <= CTRL_LOCKED(0);
+ STAT_LOCKED(0) <= is_locked;
+ STAT_LOCKED(15 downto 1) <= (others => '0');
+
+ reg_locked: process(CLK)
+ begin
+ if rising_edge(CLK) then
+ if RESET = '1' then
+ is_locked <= '0';
+ elsif CLK_EN = '1' then
+ is_locked <= got_locked;
+ end if;
+ end if;
+ end process;
+ end generate;
- comb_TRANSMITTED_BUFFERS : process (increase_TRANSMITTED_BUFFERS, decrease_TRANSMITTED_BUFFERS, TRANSMITTED_BUFFERS)
- begin
- if (increase_TRANSMITTED_BUFFERS = '1' and decrease_TRANSMITTED_BUFFERS = '0') then
- next_TRANSMITTED_BUFFERS <= TRANSMITTED_BUFFERS +1;
- elsif (increase_TRANSMITTED_BUFFERS = '0' and decrease_TRANSMITTED_BUFFERS = '1') then
- next_TRANSMITTED_BUFFERS <= TRANSMITTED_BUFFERS -1;
- else
- next_TRANSMITTED_BUFFERS <= TRANSMITTED_BUFFERS;
- end if;
- end process;
- reg_TRANSMITTED_BUFFERS : process(CLK)
- begin
- if rising_edge(CLK) then
- if RESET = '1' then
- TRANSMITTED_BUFFERS <= "00";
- elsif CLK_EN = '1' then
- TRANSMITTED_BUFFERS <= next_TRANSMITTED_BUFFERS;
- end if;
- end if;
- end process;
- comb_locked : process (MED_READ_IN, saved_packet_type, transfer_counter, release_locked, is_locked)
- begin -- process
- got_locked <= is_locked and not release_locked;
- if MED_READ_IN = '1' then
- if saved_packet_type = TYPE_TRM and transfer_counter = "11" and release_locked = '0' then
- got_locked <= '1';
- end if;
- end if;
- end process;
- release_locked <= CTRL_LOCKED(0);
- STAT_LOCKED(0) <= is_locked;
- STAT_LOCKED(15 downto 1) <= (others => '0');
- reg_locked: process(CLK)
- begin
- if rising_edge(CLK) then
- if RESET = '1' then
- is_locked <= '0';
- elsif CLK_EN = '1' then
- is_locked <= got_locked;
- end if;
- end if;
- end process;
end architecture;
\ No newline at end of file
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