updated 32PinAddOn project to tdc_v2.3

diff --git a/32PinAddOn/tdc_release b/32PinAddOn/tdc_release
index 7733c1d52bb62e789bfc74cd22c86cdc2e53b224..6a654d00badf0b7b4e12e224659319fd8db1522a 120000 (symlink)
--- a/32PinAddOn/tdc_release
+++ b/32PinAddOn/tdc_release
@@ -1 +1 @@
-../../tdc/releases/tdc_v2.1.5
\ No newline at end of file
+../../tdc/releases/tdc_v2.3
\ No newline at end of file

diff --git a/32PinAddOn/trb3_periph_32PinAddOn.prj b/32PinAddOn/trb3_periph_32PinAddOn.prj
index e4b144fd31b6e95fa0b2efaa2d2f18d85e0d5087..597b3b5141fa6b90aead2cbb94411a403a4ff36e 100644 (file)
--- a/32PinAddOn/trb3_periph_32PinAddOn.prj
+++ b/32PinAddOn/trb3_periph_32PinAddOn.prj
@@ -71,6 +71,7 @@ add_file -vhdl -lib work "../../trbnet/trb_net_sbuf6.vhd"
 add_file -vhdl -lib work "../../trbnet/trb_net16_sbuf.vhd"
 add_file -vhdl -lib work "../../trbnet/trb_net16_regIO.vhd"
 add_file -vhdl -lib work "../../trbnet/trb_net16_regio_bus_handler.vhd"
+add_file -vhdl -lib work "../../trbnet/trb_net16_regio_bus_handler_record.vhd"
 add_file -vhdl -lib work "../../trbnet/trb_net_priority_encoder.vhd"
 add_file -vhdl -lib work "../../trbnet/trb_net_dummy_fifo.vhd"
 add_file -vhdl -lib work "../../trbnet/trb_net16_dummy_fifo.vhd"
@@ -152,21 +153,25 @@ add_file -vhdl -lib work "../base/code/sedcheck.vhd"
 
 add_file -vhdl -lib work "tdc_release/tdc_components.vhd"
 add_file -vhdl -lib work "tdc_release/bit_sync.vhd"
-add_file -vhdl -lib work "tdc_release/BusHandler.vhd"
+#add_file -vhdl -lib work "tdc_release/BusHandler.vhd"
+add_file -vhdl -lib work "tdc_release/BusHandler_record.vhd"
 add_file -vhdl -lib work "tdc_release/Channel_200.vhd"
 add_file -vhdl -lib work "tdc_release/Channel.vhd"
-add_file -vhdl -lib work "tdc_release/Encoder_304_Bit.vhd"
+#add_file -vhdl -lib work "tdc_release/Encoder_304_Bit.vhd"
+add_file -vhdl -lib work "tdc_release/Encoder_288_Bit.vhd"
 add_file -vhdl -lib work "tdc_release/fallingEdgeDetect.vhd"
 add_file -vhdl -lib work "tdc_release/hit_mux.vhd"
 add_file -vhdl -lib work "tdc_release/LogicAnalyser.vhd"
-add_file -vhdl -lib work "tdc_release/Readout.vhd"
+#add_file -vhdl -lib work "tdc_release/Readout.vhd"
+add_file -vhdl -lib work "tdc_release/Readout_record.vhd"
 add_file -vhdl -lib work "tdc_release/risingEdgeDetect.vhd"
 add_file -vhdl -lib work "tdc_release/ROM_encoder_ecp3.vhd"
 add_file -vhdl -lib work "tdc_release/ShiftRegisterSISO.vhd"
 add_file -vhdl -lib work "tdc_release/Stretcher_A.vhd"
 add_file -vhdl -lib work "tdc_release/Stretcher_B.vhd"
 add_file -vhdl -lib work "tdc_release/Stretcher.vhd"
-add_file -vhdl -lib work "tdc_release/TDC.vhd"
+#add_file -vhdl -lib work "tdc_release/TDC.vhd"
+add_file -vhdl -lib work "tdc_release/TDC_record.vhd"
 add_file -vhdl -lib work "tdc_release/TriggerHandler.vhd"
 add_file -vhdl -lib work "tdc_release/up_counter.vhd"
 add_file -vhdl -lib work "../../tdc/base/cores/ecp3/FIFO/FIFO_DC_36x128_DynThr_OutReg.vhd"