*** empty log message ***

diff --git a/trb_net16_endpoint_0_trg_1_api.vhd b/trb_net16_endpoint_0_trg_1_api.vhd
index a7c21431cb9822b7da8879b38bde169554729e37..ec1fe9d620602b9ec52c549fdb2960e6c50b75cb 100644 (file)
--- a/trb_net16_endpoint_0_trg_1_api.vhd
+++ b/trb_net16_endpoint_0_trg_1_api.vhd
@@ -201,7 +201,7 @@ architecture trb_net16_endpoint_0_trg_1_api_arch of trb_net16_endpoint_0_trg_1_a
       APL_RUN_OUT           : out std_logic;
       APL_MY_ADDRESS_IN     : in  std_logic_vector (15 downto 0);
       APL_SEQNR_OUT         : out std_logic_vector (7 downto 0);
-
+      APL_LENGTH_IN         : in  std_logic_vector (15 downto 0);
       -- Internal direction port
       -- the ports with master or slave in their name are to be mapped by the active api
       -- to the init respectivly the reply path and vice versa in the passive api.
@@ -428,6 +428,7 @@ begin
         APL_RUN_OUT       => APL_RUN_OUT,
         APL_MY_ADDRESS_IN => APL_MY_ADDRESS_IN,
         APL_SEQNR_OUT     => APL_SEQNR_OUT,
+        APL_LENGTH_IN     => APL_LENGTH_IN,
         -- Internal direction port
         INT_MASTER_DATAREADY_OUT => apl_to_buf_INIT_DATAREADY,
         INT_MASTER_DATA_OUT      => apl_to_buf_INIT_DATA,
@@ -485,6 +486,7 @@ begin
         APL_RUN_OUT       => APL_RUN_OUT,
         APL_MY_ADDRESS_IN => APL_MY_ADDRESS_IN,
         APL_SEQNR_OUT     => APL_SEQNR_OUT,
+        APL_LENGTH_IN     => APL_LENGTH_IN,
         -- Internal direction port
         INT_MASTER_DATAREADY_OUT => apl_to_buf_REPLY_DATAREADY,
         INT_MASTER_DATA_OUT      => apl_to_buf_REPLY_DATA,

diff --git a/trb_net16_hub_base.vhd b/trb_net16_hub_base.vhd
index d279426b658ee7188497c5a683b85e92732f0d27..e64b58bd4fd8dc400a997ad4af197f75677dd4ec 100644 (file)
--- a/trb_net16_hub_base.vhd
+++ b/trb_net16_hub_base.vhd
@@ -371,6 +371,7 @@ architecture trb_net16_hub_base_arch of trb_net16_hub_base is
       APL_RUN_OUT           : out std_logic;
       APL_MY_ADDRESS_IN     : in  std_logic_vector (15 downto 0);
       APL_SEQNR_OUT         : out std_logic_vector (7 downto 0);
+      APL_LENGTH_IN         : in  std_logic_vector (15 downto 0);
       -- Internal direction port
       -- the ports with master or slave in their name are to be mapped by the active api
       -- to the init respectivly the reply path and vice versa in the passive api.
@@ -717,6 +718,7 @@ MED_DATA_OUT       <= buf_MED_DATA_OUT;
         APL_RUN_OUT           => HC_RUN_OUT,
         APL_MY_ADDRESS_IN     => HUB_ADDRESS,
         APL_SEQNR_OUT         => HC_SEQNR_OUT(7 downto 0),
+        APL_LENGTH_IN         => (others => '1'),
         -- Internal direction port
         INT_MASTER_DATAREADY_OUT  => buf_to_hub_REPLY_DATAREADY(i),
         INT_MASTER_DATA_OUT       => buf_to_hub_REPLY_DATA((i+1)*c_DATA_WIDTH-1 downto i*c_DATA_WIDTH),
@@ -786,6 +788,7 @@ MED_DATA_OUT       <= buf_MED_DATA_OUT;
             APL_RUN_OUT           => APL_RUN_OUT(aploffset),
             APL_MY_ADDRESS_IN     => APL_MY_ADDRESS_IN((aploffset+1)*16-1 downto aploffset*16),
             APL_SEQNR_OUT         => APL_SEQNR_OUT((aploffset+1)*8-1 downto aploffset*8),
+            APL_LENGTH_IN         => APL_LENGTH_IN((aploffset+1)*16-1 downto aploffset*16),
             -- Internal direction port
             INT_MASTER_DATAREADY_OUT  => buf_to_hub_REPLY_DATAREADY(i),
             INT_MASTER_DATA_OUT       => buf_to_hub_REPLY_DATA((i+1)*c_DATA_WIDTH-1 downto i*c_DATA_WIDTH),
@@ -849,6 +852,7 @@ MED_DATA_OUT       <= buf_MED_DATA_OUT;
             APL_RUN_OUT           => APL_RUN_OUT(aploffset),
             APL_MY_ADDRESS_IN     => APL_MY_ADDRESS_IN((aploffset+1)*16-1 downto aploffset*16),
             APL_SEQNR_OUT         => APL_SEQNR_OUT((aploffset+1)*8-1 downto aploffset*8),
+            APL_LENGTH_IN         => APL_LENGTH_IN((aploffset+1)*16-1 downto aploffset*16),
             -- Internal direction port
             INT_MASTER_DATAREADY_OUT  => buf_to_hub_INIT_DATAREADY(i),
             INT_MASTER_DATA_OUT       => buf_to_hub_INIT_DATA((i+1)*c_DATA_WIDTH-1 downto i*c_DATA_WIDTH),