LINK_OK_IN : in std_logic;\r
ALLOW_RX_IN : in std_logic;\r
MY_MAC_IN : in std_logic_vector(47 downto 0);\r
+ MY_IP_IN : in std_logic_vector(31 downto 0);\r
-- killer ping\r
MY_TRBNET_ADDRESS_IN : in std_logic_vector(15 downto 0) := (others => '0');\r
ISSUE_REBOOT_OUT : out std_logic;\r
FR_GET_FRAME_IN : in std_logic; -- interconnect to gbe_receive_control\r
FR_FRAME_SIZE_OUT : out std_logic_vector(15 downto 0); -- interconnect to gbe_receive_control\r
FR_PS_OUT : out std_logic_vector(c_MAX_PROTOCOLS - 1 downto 0);\r
+ FR_INFO_OUT : out std_logic_vector(7 downto 0);\r
--\r
FR_SRC_MAC_ADDRESS_OUT : out std_logic_vector(47 downto 0);\r
FR_DEST_MAC_ADDRESS_OUT : out std_logic_vector(47 downto 0);\r
\r
architecture gbe_frame_receiver_arch of gbe_frame_receiver is\r
\r
- signal mac_rxd_q : std_logic_vector(7 downto 0);\r
+ signal mac_rxd_q : std_logic_vector(7 downto 0);\r
signal mac_rx_en_q : std_logic;\r
signal mac_rx_er_q : std_logic;\r
signal mac_rx_eof_q : std_logic;\r
signal decode_fsm : std_logic_vector(3 downto 0);\r
signal decode_ctr : unsigned(7 downto 0);\r
\r
- signal is_my_mac_x : std_logic;\r
- signal is_broadcast_x : std_logic;\r
- signal is_arp_x : std_logic;\r
- signal is_ipv4_x : std_logic;\r
- signal is_version_x : std_logic;\r
- signal is_udp_x : std_logic;\r
- signal is_icmp_x : std_logic;\r
- signal is_dhcp_x : std_logic;\r
- signal is_sctrl_x : std_logic;\r
+ signal is_my_mac_x : std_logic; -- MAC match, no broadcast\r
+ signal is_broadcast_x : std_logic; -- broadcast MAC detected\r
+ signal is_arp_x : std_logic; -- ARP frame detected\r
+ signal is_ipv4_x : std_logic; -- IPv4 frame detected\r
+ signal is_version_x : std_logic; -- correct IP version and header length\r
+ signal is_udp_x : std_logic; -- UDP detected\r
+ signal is_icmp_x : std_logic; -- ICMP detected\r
+ signal is_dhcp_x : std_logic; -- DHCP detected\r
+ signal is_sctrl_x : std_logic; -- SCTRL detected\r
+ signal is_my_ip_x : std_logic; -- IP match, no broadcast\r
+ signal is_broadcast_ip_x : std_logic; -- broadcast IP detected\r
+ signal is_empty_payload_x : std_logic; -- empty payload detected (for frames stored!)\r
\r
signal stored_src_mac : std_logic_vector(47 downto 0);\r
signal stored_dst_mac : std_logic_vector(47 downto 0);\r
signal fr_src_mac : std_logic_vector(47 downto 0);\r
signal fr_ps : std_logic_vector(7 downto 0);\r
signal fr_q : std_logic_vector(8 downto 0);\r
+ signal fr_info : std_logic_vector(7 downto 0);
\r
signal oob_register_0_int : std_logic_vector(31 downto 0);\r
signal oob_register_1_int : std_logic_vector(31 downto 0);\r
signal drop_frame_x : std_logic;\r
signal drop_frame : std_logic;\r
\r
+ signal fifo_one_q : std_logic_vector(71 downto 0);\r
+ signal fifo_two_q : std_logic_vector(71 downto 0);\r
+\r
begin\r
\r
-- buffer incoming signals\r
-- correct IPv4 header\r
if( (is_udp_x = '1') ) then\r
-- UDP header\r
- if ( (is_dhcp_x = '1') or (is_sctrl_x = '1') ) then\r
- -- DHCP, SCTRL\r
- if( (mac_rx_eof_q = '0') ) then\r
- -- payload available\r
- DECODE_NS <= STORE_FRAME;\r
- else\r
- -- empty payload, store raw frame, check that later?\r
- DECODE_NS <= LAST_BYTE;\r
- fifo_hd_wr_x <= '1';\r
- end if;\r
- end if;\r
+-- if ( (is_dhcp_x = '1') or (is_sctrl_x = '1') ) then\r
+-- -- DHCP, SCTRL\r
+-- if( (mac_rx_eof_q = '0') ) then\r
+-- -- payload available\r
+-- DECODE_NS <= STORE_FRAME;\r
+-- else\r
+-- -- empty payload, store raw frame, check that later?\r
+-- DECODE_NS <= LAST_BYTE;\r
+-- fifo_hd_wr_x <= '1';\r
+-- end if;\r
+-- end if;\r
+ if( (is_dhcp_x = '1') ) then
+ -- DHCP
+ if( (mac_rx_eof_q = '0') ) then
+ -- payload available
+ DECODE_NS <= STORE_FRAME;
+ else
+ -- empty payload, must never happen with DHCP, so we drop it
+ DECODE_NS <= LAST_BYTE;
+ end if;
+ end if;
+ if( (is_sctrl_x = '1') ) then
+ -- SCTRL
+ if( (mac_rx_eof_q = '0') ) then
+ -- payload available
+ DECODE_NS <= STORE_FRAME;
+ else
+ -- empty payload, must never happen with SCTRL, so we drop it
+ DECODE_NS <= LAST_BYTE;
+ end if;
+ end if;
end if;\r
end if;\r
\r
\r
-- we need an emergency exit in case frame is "strange"!\r
if( (mac_rx_eof_qq = '1') ) then\r
- DECODE_NS <= WRITE_HDR;\r
+ DECODE_NS <= WRITE_HDR; -- really?\r
end if;\r
\r
when IGNORE_FRAME =>\r
\r
when STORE_FRAME =>\r
decode_fsm <= x"3";\r
- if( MAC_RX_EOF_IN = '1' ) then\r
+ -- second term is needed for payload of one byte!\r
+ if( (MAC_RX_EOF_IN = '1') or (mac_rx_eof_q = '1') ) then\r
DECODE_NS <= LAST_BYTE;\r
fifo_hd_wr_x <= '1';\r
else\r
end process PROC_STORE_INFO;\r
\r
-- checks to filter frames, and distribute them to the correct handlers\r
- is_my_mac_x <= '1' when (stored_dst_mac = MY_MAC_IN) else '0';\r
- is_broadcast_x <= '1' when (stored_dst_mac = x"ffffffffffff") else '0';\r
- is_arp_x <= '1' when (stored_ethertype = x"0806") else '0';\r
- is_ipv4_x <= '1' when (stored_ethertype = x"0800") else '0';\r
- is_version_x <= '1' when (stored_version = x"45") else '0';\r
- is_udp_x <= '1' when (stored_protocol = x"11") else '0';\r
- is_icmp_x <= '1' when (stored_protocol = x"01") else '0';\r
- is_dhcp_x <= '1' when (stored_dst_port = x"0044") else '0';\r
- is_sctrl_x <= '1' when (stored_dst_port = x"6590") else '0';\r
+ is_my_mac_x <= '1' when (stored_dst_mac = MY_MAC_IN) else '0';\r
+ is_broadcast_x <= '1' when (stored_dst_mac = x"ffffffffffff") else '0';\r
+ is_arp_x <= '1' when (stored_ethertype = x"0806") else '0';\r
+ is_ipv4_x <= '1' when (stored_ethertype = x"0800") else '0';\r
+ is_version_x <= '1' when (stored_version = x"45") else '0';\r
+ is_udp_x <= '1' when (stored_protocol = x"11") else '0';\r
+ is_icmp_x <= '1' when (stored_protocol = x"01") else '0';\r
+ is_dhcp_x <= '1' when (stored_dst_port = x"0044") else '0';\r
+ is_sctrl_x <= '1' when (stored_dst_port = x"6590") else '0';\r
+ is_my_ip_x <= '1' when (stored_dst_ip = MY_IP_IN) else '0';\r
+ is_broadcast_ip_x <= '1' when (stored_dst_ip = x"ffffffff") else '0';\r
+ is_empty_payload_x <= '1' when (rx_bytes_ctr = 0) else '0';\r
\r
-- syncing signals\r
PROC_SYNC_SIGNALS: process( CLK )\r
-- Three is fine, two fails - data arrives late.\r
-- Happens when main control tries to read a frame directly when it was written.\r
\r
+ -- OPTIMIZE: two 512x72 instead of three.\r
+ -- to be removed: dst port\r
+ -- to be reduced: dst mac -> 2bit (is_my_mac_x, is_broadcast_x)\r
+ -- dst ip -> 2bit (is_my_ip_x, is_ip_broadcast_x)\r
+ -- to be used: proto sel -> 8bit\r
+\r
+--------------------------------------------------------------------------------------------\r
+--------------------------------------------------------------------------------------------\r
-- FIFO for header information\r
- THE_FIRST_FIFO: entity work.fifo_512x72_s\r
+ THE_FIFO_ONE: entity work.fifo_512x72_s\r
port map(\r
Data(47 downto 0) => stored_src_mac,\r
Data(63 downto 48) => stored_src_port,\r
- Data(71 downto 64) => std_logic_vector(rx_bytes_ctr(7 downto 0)),\r
- Clock => CLK,\r
- WrEn => fifo_hd_wr_q,\r
- RdEn => FR_GET_FRAME_IN,\r
- Reset => RESET,\r
- Q(47 downto 0) => fr_src_mac,\r
- Q(63 downto 48) => fr_src_udp,\r
- Q(71 downto 64) => fr_frame_size(7 downto 0),\r
- Empty => open, -- BUG\r
- Full => open -- BUG\r
- );\r
-\r
- -- FIFO for header information\r
- THE_SECOND_FIFO: entity work.fifo_512x72_s\r
- port map(\r
- Data(47 downto 0) => stored_dst_mac,\r
- Data(63 downto 48) => stored_dst_port,\r
- Data(71 downto 64) => protocol_select,\r
+ Data(71 downto 64) => (others => '0'),\r
Clock => CLK,\r
WrEn => fifo_hd_wr_q,\r
RdEn => FR_GET_FRAME_IN,\r
Reset => RESET,\r
- Q(47 downto 0) => fr_dest_mac,\r
- Q(63 downto 48) => fr_dest_udp,\r
- Q(71 downto 64) => fr_ps,\r
+ Q => fifo_one_q,\r
Empty => open, -- BUG\r
Full => open -- BUG\r
);\r
\r
-- FIFO for header information\r
- THE_THIRD_FIFO: entity work.fifo_512x72_s\r
+ THE_FIFO_TWO: entity work.fifo_512x72_s\r
port map(\r
Data(31 downto 0) => stored_src_ip,\r
- Data(63 downto 32) => stored_dst_ip,\r
- Data(71 downto 64) => std_logic_vector(rx_bytes_ctr(15 downto 8)),\r
+ Data(47 downto 32) => std_logic_vector(rx_bytes_ctr),\r
+ Data(55 downto 48) => protocol_select,\r
+ Data(56) => is_my_mac_x,\r
+ Data(57) => is_broadcast_x,\r
+ Data(58) => is_my_ip_x,\r
+ Data(59) => is_broadcast_ip_x,\r
+ Data(60) => is_empty_payload_x,
+ Data(61) => '0', -- reserved
+ Data(62) => '0', -- reserved
+ Data(63) => '0', -- reserved
+ Data(71 downto 64) => (others => '0'),\r
Clock => CLK,\r
WrEn => fifo_hd_wr_q,\r
RdEn => FR_GET_FRAME_IN,\r
Reset => RESET,\r
- Q(31 downto 0) => fr_src_ip,\r
- Q(63 downto 32) => fr_dest_ip,\r
- Q(71 downto 64) => fr_frame_size(15 downto 8),\r
+ Q => fifo_two_q,\r
Empty => open, -- BUG\r
Full => open -- BUG\r
);\r
\r
+ -- decode fifo_one_q and fifo_two_q
+ fr_dest_mac <= (others => '0');\r
+ fr_src_mac <= fifo_one_q(47 downto 0);\r
+ fr_dest_ip <= (others => '0');\r
+ fr_src_ip <= fifo_two_q(31 downto 0);\r
+ fr_dest_udp <= (others => '0');\r
+ fr_src_udp <= fifo_one_q(63 downto 48);\r
+ fr_frame_size <= fifo_two_q(47 downto 32);\r
+ fr_ps <= fifo_two_q(55 downto 48);\r
+ fr_info <= fifo_two_q(63 downto 56);\r
+\r
+\r
+--------------------------------------------------------------------------------------------\r
+--------------------------------------------------------------------------------------------\r
+-- -- FIFO for header information\r
+-- THE_FIRST_FIFO: entity work.fifo_512x72_s\r
+-- port map(\r
+-- Data(47 downto 0) => stored_src_mac,\r
+-- Data(63 downto 48) => stored_src_port,\r
+-- Data(71 downto 64) => std_logic_vector(rx_bytes_ctr(7 downto 0)),\r
+-- Clock => CLK,\r
+-- WrEn => fifo_hd_wr_q,\r
+-- RdEn => FR_GET_FRAME_IN,\r
+-- Reset => RESET,\r
+-- Q(47 downto 0) => fr_src_mac,\r
+-- Q(63 downto 48) => fr_src_udp,\r
+-- Q(71 downto 64) => fr_frame_size(7 downto 0),\r
+-- Empty => open, -- BUG\r
+-- Full => open -- BUG\r
+-- );\r
+--\r
+-- -- FIFO for header information\r
+-- THE_SECOND_FIFO: entity work.fifo_512x72_s\r
+-- port map(\r
+-- Data(47 downto 0) => stored_dst_mac,\r
+-- Data(63 downto 48) => stored_dst_port,\r
+-- Data(71 downto 64) => protocol_select,\r
+-- Clock => CLK,\r
+-- WrEn => fifo_hd_wr_q,\r
+-- RdEn => FR_GET_FRAME_IN,\r
+-- Reset => RESET,\r
+-- Q(47 downto 0) => fr_dest_mac,\r
+-- Q(63 downto 48) => fr_dest_udp,\r
+-- Q(71 downto 64) => fr_ps,\r
+-- Empty => open, -- BUG\r
+-- Full => open -- BUG\r
+-- );\r
+--\r
+-- -- FIFO for header information\r
+-- THE_THIRD_FIFO: entity work.fifo_512x72_s\r
+-- port map(\r
+-- Data(31 downto 0) => stored_src_ip,\r
+-- Data(63 downto 32) => stored_dst_ip,\r
+-- Data(71 downto 64) => std_logic_vector(rx_bytes_ctr(15 downto 8)),\r
+-- Clock => CLK,\r
+-- WrEn => fifo_hd_wr_q,\r
+-- RdEn => FR_GET_FRAME_IN,\r
+-- Reset => RESET,\r
+-- Q(31 downto 0) => fr_src_ip,\r
+-- Q(63 downto 32) => fr_dest_ip,\r
+-- Q(71 downto 64) => fr_frame_size(15 downto 8),\r
+-- Empty => open, -- BUG\r
+-- Full => open -- BUG\r
+-- );\r
+\r
PROC_OUT_SYNC: process( CLK )\r
begin\r
if( rising_edge(CLK) ) then\r
FR_FRAME_SIZE_OUT <= fr_frame_size;\r
FR_Q_OUT <= fr_q;\r
FR_PS_OUT <= fr_ps(c_MAX_PROTOCOLS - 1 downto 0);\r
+ FR_INFO_OUT <= fr_info;\r
end if;\r
end process PROC_OUT_SYNC;\r
\r
signal mc_ident : std_logic_vector(15 downto 0);
signal link_ok : std_logic;
- signal dhcp_done : std_logic;
+ signal dhcp_done : std_logic;\r
+ signal my_ip : std_logic_vector(31 downto 0);
signal make_reset : std_logic;
signal frame_pause : std_logic_vector(31 downto 0);
- signal fr_ps_int : std_logic_vector(c_MAX_PROTOCOLS - 1 downto 0);
+ signal fr_ps : std_logic_vector(c_MAX_PROTOCOLS - 1 downto 0);
+ signal fr_frame_info : std_logic_vector(7 downto 0);
+ signal rc_frame_info : std_logic_vector(7 downto 0);
signal debug_main : std_logic_vector(63 downto 0);
signal debug_fr : std_logic_vector(31 downto 0);
-- DEBUG_OUT(31 downto 28) <= debug_fr(31 downto 28); -- frame receiver state
-- DEBUG_OUT(27 downto 24) <= debug_rc(3 downto 0); -- receive control state
-- DEBUG_OUT(23 downto 20) <= debug_main(23 downto 20); -- redirect state
--- DEBUG_OUT(19 downto 16) <= fr_ps_int(3 downto 0); --debug_main(27 downto 24); -- link state
+-- DEBUG_OUT(19 downto 16) <= fr_ps(3 downto 0); --debug_main(27 downto 24); -- link state
-- DEBUG_OUT(15) <= rc_loading_done;
-- DEBUG_OUT(14) <= rc_frame_ready;
--- DEBUG_OUT(13) <= fr_ps_int(4); --rc_frame_proto(4); -- ICMP
--- DEBUG_OUT(12) <= fr_ps_int(1); --rc_frame_proto(1); -- DHCP
--- DEBUG_OUT(11) <= fr_ps_int(0); --rc_frame_proto(0); -- ARP
+-- DEBUG_OUT(13) <= fr_ps(4); --rc_frame_proto(4); -- ICMP
+-- DEBUG_OUT(12) <= fr_ps(1); --rc_frame_proto(1); -- DHCP
+-- DEBUG_OUT(11) <= fr_ps(0); --rc_frame_proto(0); -- ARP
-- DEBUG_OUT(10) <= fr_get_frame;
-- DEBUG_OUT(9) <= fr_frame_valid;
-- DEBUG_OUT(8) <= fr_rd_en;
---------------------------------------------------------------------------------------------------
---------------------------------------------------------------------------------------------------
- DHCP_DONE_OUT <= dhcp_done;
+ DHCP_DONE_OUT <= dhcp_done;\r
+ MY_IP_OUT <= my_ip;
THE_GBE_MAIN_CONTROL: entity work.gbe_main_control
generic map(
RESET => RESET,
MC_LINK_OK_OUT => link_ok,
MC_DHCP_DONE_OUT => dhcp_done,
- MY_IP_OUT => MY_IP_OUT,
+ MY_IP_OUT => my_ip, --MY_IP_OUT,
MC_MY_MAC_IN => MY_MAC_IN,
MY_TRBNET_ADDRESS_IN => MY_TRBNET_ADDRESS_IN,
ISSUE_REBOOT_OUT => open, --ISSUE_REBOOT_OUT,
RC_DATA_IN => rc_q,
RC_RD_EN_OUT => rc_rd_en,
RC_FRAME_SIZE_IN => rc_frame_size,
- RC_FRAME_PROTO_IN => rc_frame_proto,
+ RC_FRAME_PROTO_IN => rc_frame_proto,\r
+ RC_FRAME_INFO_IN => rc_frame_info,
RC_SRC_MAC_ADDRESS_IN => rc_src_mac,
RC_DEST_MAC_ADDRESS_IN => rc_dest_mac,
RC_SRC_IP_ADDRESS_IN => rc_src_ip,
FR_FRAME_VALID_IN => fr_frame_valid,
FR_GET_FRAME_OUT => fr_get_frame,
FR_FRAME_SIZE_IN => fr_frame_size,
- FR_PS_IN => fr_ps_int,
+ FR_PS_IN => fr_ps,\r
+ FR_INFO_IN => fr_frame_info,
FR_SRC_MAC_ADDRESS_IN => fr_src_mac,
FR_DEST_MAC_ADDRESS_IN => fr_dest_mac,
FR_SRC_IP_ADDRESS_IN => fr_src_ip,
RC_SRC_IP_ADDRESS_OUT => rc_src_ip,
RC_DEST_IP_ADDRESS_OUT => rc_dest_ip,
RC_SRC_UDP_PORT_OUT => rc_src_udp,
- RC_DEST_UDP_PORT_OUT => rc_dest_udp,
+ RC_DEST_UDP_PORT_OUT => rc_dest_udp,\r
+ RC_INFO_OUT => rc_frame_info,
-- statistics
FRAMES_RECEIVED_OUT => rc_frames_rec_ctr,
BYTES_RECEIVED_OUT => rc_bytes_rec,
RESET => RESET,
LINK_OK_IN => LINK_ACTIVE_IN,
ALLOW_RX_IN => CFG_ALLOW_RX_IN,
- MY_MAC_IN => MY_MAC_IN,
+ MY_MAC_IN => MY_MAC_IN,\r
+ MY_IP_IN => my_ip,
--
MY_TRBNET_ADDRESS_IN => MY_TRBNET_ADDRESS_IN,
ISSUE_REBOOT_OUT => ISSUE_REBOOT_OUT,
FR_FRAME_VALID_OUT => fr_frame_valid,
FR_GET_FRAME_IN => fr_get_frame,
FR_FRAME_SIZE_OUT => fr_frame_size,
- FR_PS_OUT => fr_ps_int,
+ FR_PS_OUT => fr_ps,
+ FR_INFO_OUT => fr_frame_info,
--
FR_SRC_MAC_ADDRESS_OUT => fr_src_mac,
FR_DEST_MAC_ADDRESS_OUT => fr_dest_mac,
RC_RD_EN_OUT : out std_logic;\r
RC_FRAME_SIZE_IN : in std_logic_vector(15 downto 0);\r
RC_FRAME_PROTO_IN : in std_logic_vector(c_MAX_PROTOCOLS - 1 downto 0);\r
+ RC_FRAME_INFO_IN : in std_logic_vector(7 downto 0);
--\r
RC_SRC_MAC_ADDRESS_IN : in std_logic_vector(47 downto 0);\r
RC_DEST_MAC_ADDRESS_IN : in std_logic_vector(47 downto 0);\r
\r
when DROP =>\r
redirect_state <= x"3";\r
+ -- BUG: fails with empty payload!\r
if( loaded_bytes_ctr = unsigned(RC_FRAME_SIZE_IN) - 1 ) then\r
-- frame has been loaded\r
REDIRECT_NS <= WAIT_ONE;\r
\r
when LOAD =>\r
redirect_state <= x"5";\r
+ -- BUG: fails with empty payload!\r
if( loaded_bytes_ctr = unsigned(RC_FRAME_SIZE_IN) - 1 ) then\r
-- all bytes loaded\r
REDIRECT_NS <= WAIT_ONE;\r
PS_PROTO_SELECT_IN => RC_FRAME_PROTO_IN,\r
PS_BUSY_OUT => ps_busy,\r
PS_FRAME_SIZE_IN => RC_FRAME_SIZE_IN,\r
+ PS_FRAME_INFO_IN => RC_FRAME_INFO_IN,\r
PS_RESPONSE_READY_OUT => ps_response_ready,\r
PS_SRC_MAC_ADDRESS_IN => RC_SRC_MAC_ADDRESS_IN,\r
PS_DEST_MAC_ADDRESS_IN => RC_DEST_MAC_ADDRESS_IN,\r
PS_WR_EN_IN : in std_logic;
PS_PROTO_SELECT_IN : in std_logic_vector(c_MAX_PROTOCOLS - 1 downto 0);
PS_BUSY_OUT : out std_logic_vector(c_MAX_PROTOCOLS - 1 downto 0);
- PS_FRAME_SIZE_IN : in std_logic_vector(15 downto 0);
+ PS_FRAME_SIZE_IN : in std_logic_vector(15 downto 0);\r
+ PS_FRAME_INFO_IN : in std_logic_vector(7 downto 0);
PS_RESPONSE_READY_OUT : out std_logic;
PS_SRC_MAC_ADDRESS_IN : in std_logic_vector(47 downto 0);
PS_DEST_MAC_ADDRESS_IN : in std_logic_vector(47 downto 0);
PS_SRC_IP_ADDRESS_IN => PS_SRC_IP_ADDRESS_IN,
PS_DEST_IP_ADDRESS_IN => PS_DEST_IP_ADDRESS_IN,
PS_SRC_UDP_PORT_IN => PS_SRC_UDP_PORT_IN,
- PS_DEST_UDP_PORT_IN => PS_DEST_UDP_PORT_IN,
+ PS_DEST_UDP_PORT_IN => PS_DEST_UDP_PORT_IN,\r
+ PS_FRAME_INFO_IN => PS_FRAME_INFO_IN,
TC_RD_EN_IN => TC_RD_EN_IN,
TC_DATA_OUT => tc_data(2 * 9 - 1 downto 1 * 9),
TC_FRAME_SIZE_OUT => tc_size(2 * 16 - 1 downto 1 * 16),
use work.trb_net_std.all;\r
use work.gbe_protocols.all;\r
\r
+-- BUG: use (not FIFO_EMPTY) from gbe_frame_receiver to indicate\r
+-- frames in queue.\r
+\r
entity gbe_receive_control is\r
port (\r
CLK : in std_logic; -- system clock\r
FR_FRAME_VALID_IN : in std_logic;\r
FR_GET_FRAME_OUT : out std_logic;\r
FR_FRAME_SIZE_IN : in std_logic_vector(15 downto 0);\r
- FR_PS_IN : in std_logic_vector(c_MAX_PROTOCOLS - 1 downto 0);\r
+ FR_PS_IN : in std_logic_vector(c_MAX_PROTOCOLS - 1 downto 0);
+ FR_INFO_IN : in std_logic_vector(7 downto 0);
FR_SRC_MAC_ADDRESS_IN : in std_logic_vector(47 downto 0);\r
FR_DEST_MAC_ADDRESS_IN : in std_logic_vector(47 downto 0);\r
FR_SRC_IP_ADDRESS_IN : in std_logic_vector(31 downto 0);\r
RC_DEST_IP_ADDRESS_OUT : out std_logic_vector(31 downto 0);\r
RC_SRC_UDP_PORT_OUT : out std_logic_vector(15 downto 0);\r
RC_DEST_UDP_PORT_OUT : out std_logic_vector(15 downto 0);\r
+ RC_INFO_OUT : out std_logic_vector(7 downto 0);
-- statistics\r
FRAMES_RECEIVED_OUT : out std_logic_vector(31 downto 0);\r
BYTES_RECEIVED_OUT : out std_logic_vector(31 downto 0);\r
signal bytes_rec_ctr : unsigned(31 downto 0);\r
\r
signal state : std_logic_vector(3 downto 0);\r
- signal proto_code : std_logic_vector(c_MAX_PROTOCOLS - 1 downto 0);\r
- signal reset_prioritizer : std_logic;\r
- signal saved_proto : std_logic_vector(c_MAX_PROTOCOLS - 1 downto 0);\r
\r
begin\r
\r
DEBUG_OUT(31 downto 4) <= (others => '0');\r
DEBUG_OUT(3 downto 0) <= state;\r
- \r
+\r
FR_RD_EN_OUT <= RC_RD_EN_IN;\r
RC_Q_OUT <= RC_DATA_IN;\r
RC_FRAME_SIZE_OUT <= FR_FRAME_SIZE_IN;\r
RC_DEST_IP_ADDRESS_OUT <= FR_DEST_IP_ADDRESS_IN;\r
RC_SRC_UDP_PORT_OUT <= FR_SRC_UDP_PORT_IN;\r
RC_DEST_UDP_PORT_OUT <= FR_DEST_UDP_PORT_IN;\r
+ RC_INFO_OUT <= FR_INFO_IN;\r
RC_FRAME_PROTO_OUT <= FR_PS_IN when (load_current_state /= IDLE) else (others => '0');\r
\r
LOAD_MACHINE_PROC: process( CLK, RESET )\r
end if;\r
end process BYTES_REC_CTR_PROC;\r
\r
- SAVED_PROTO_PROC : process( CLK )\r
- begin\r
- if( rising_edge(CLK) ) then\r
- if( load_current_state = READY ) then\r
- if( and_all(proto_code) = '0' ) then\r
- saved_proto <= proto_code;\r
- else\r
- saved_proto <= (others => '0');\r
- end if;\r
- end if;\r
- end if;\r
- end process SAVED_PROTO_PROC;\r
-\r
end gbe_receive_control_arch;\r
PS_DEST_IP_ADDRESS_IN : in std_logic_vector(31 downto 0);\r
PS_SRC_UDP_PORT_IN : in std_logic_vector(15 downto 0);\r
PS_DEST_UDP_PORT_IN : in std_logic_vector(15 downto 0);\r
+ PS_FRAME_INFO_IN : in std_logic_vector(7 downto 0);\r
--\r
TC_RD_EN_IN : in std_logic;\r
TC_DATA_OUT : out std_logic_vector(8 downto 0);\r
\r
-- signal wait_value : unsigned(31 downto 0);\r
\r
- signal long_delay_bit : integer range 0 to 31 := 29; \r
- signal short_delay_bit : integer range 0 to 31 := 12; \r
+ signal long_delay_bit : integer range 0 to 31 := 29;\r
+ signal short_delay_bit : integer range 0 to 31 := 3; --12\r
\r
begin\r
\r
end if;\r
end process PROC_MAIN_FSM;\r
\r
- -- wait time between link active and start of DHCP process\r
--- wait_value <= x"2000_0000";\r
--- wait_value <= x"0000_2000";\r
-\r
--- PROC_MAIN_TRANSITIONS : process( MAIN_CS, DHCP_START_IN, CONSTRUCT_CS, wait_ctr, RECEIVE_CS, PS_DATA_IN, wait_value )\r
PROC_MAIN_TRANSITIONS : process( MAIN_CS, DHCP_START_IN, CONSTRUCT_CS, wait_ctr, RECEIVE_CS, PS_DATA_IN )\r
begin\r
main_state <= x"0";\r
\r
when DELAY =>\r
main_state <= x"2";\r
--- if( wait_ctr = wait_value ) then\r
if( wait_ctr(short_delay_bit) = '1' ) then\r
MAIN_NS <= SENDING_DISCOVER;\r
else\r
-- BUG: fails on empty payload\r
if ( (RECEIVE_CS = SAVE_VALUES) and (PS_DATA_IN(8) = '1') ) then\r
MAIN_NS <= SENDING_REQUEST;\r
--- elsif( wait_ctr = x"2000_0000" ) then\r
elsif( wait_ctr(long_delay_bit) = '1' ) then\r
MAIN_NS <= BOOTING;\r
else\r
-- BUG: fails on empty payload\r
if ( (RECEIVE_CS = SAVE_VALUES) and (PS_DATA_IN(8) = '1') ) then\r
MAIN_NS <= ESTABLISHED;\r
--- elsif( wait_ctr = x"2000_0000" ) then\r
elsif( wait_ctr(long_delay_bit) = '1' ) then\r
MAIN_NS <= BOOTING;\r
else\r
MAIN_NS <= ESTABLISHED;\r
end if;\r
\r
- when others => \r
+ when others =>\r
MAIN_NS <= BOOTING;\r
\r
end case;\r
end if;\r
end process PROC_RECEIVE_FSM;\r
\r
- PROC_RECEIVE_TRANSITIONS: process( RECEIVE_CS, MAIN_CS, bootp_hdr, saved_dhcp_type, saved_transaction_id,\r
+ PROC_RECEIVE_TRANSITIONS: process( RECEIVE_CS, MAIN_CS, bootp_hdr, saved_dhcp_type, saved_transaction_id, PS_FRAME_INFO_IN,\r
PS_DATA_IN, PS_DEST_MAC_ADDRESS_IN, MY_MAC_IN, PS_ACTIVATE_IN, PS_WR_EN_IN, save_ctr )\r
begin\r
recv_state <= x"0";\r
recv_state <= x"1";\r
if( (PS_ACTIVATE_IN = '1') and (PS_WR_EN_IN = '1') ) then\r
if( (MAIN_CS = WAITING_FOR_OFFER) or (MAIN_CS = WAITING_FOR_ACK) ) then -- ready to receive dhcp frame\r
- if( PS_DEST_MAC_ADDRESS_IN = MY_MAC_IN ) then -- check if i'm the addressee (discards broadcasts also)\r
+-- if( PS_DEST_MAC_ADDRESS_IN = MY_MAC_IN ) then -- check if i'm the addressee (discards broadcasts also)
+ if( PS_FRAME_INFO_IN(0) = '1' ) then -- check if i'm the addressee (discards broadcasts also)
RECEIVE_NS <= SAVE_VALUES;\r
else\r
RECEIVE_NS <= DISCARD; -- discard if the frame is not for me\r
recv_state <= x"4";\r
RECEIVE_NS <= IDLE;\r
\r
- when others => \r
+ when others =>\r
RECEIVE_NS <= IDLE;\r
\r
end case;\r
when 241 =>\r
saved_dhcp_type(23 downto 16) <= PS_DATA_IN(7 downto 0);\r
\r
- when others => \r
+ when others =>\r
null;\r
\r
end case;\r
cons_state <= x"c";\r
CONSTRUCT_NS <= IDLE;\r
\r
- when others => \r
+ when others =>\r
CONSTRUCT_NS <= IDLE;\r
\r
end case;\r
signal saved_dst_mac : std_logic_vector(47 downto 0);\r
signal store_mac_x : std_logic;\r
signal store_mac : std_logic;\r
- \r
+\r
attribute syn_preserve : boolean;\r
attribute syn_keep : boolean;\r
attribute syn_keep of rx_fifo_wr, rx_fifo_rd, gsc_init_dataready, tx_fifo_wr, tx_fifo_rd, gsc_reply_read, state : signal is true;\r
DEBUG_OUT(11) <= GSC_REPLY_DATAREADY_IN;\r
DEBUG_OUT(10 downto 8) <= GSC_REPLY_PACKET_NUM_IN;\r
DEBUG_OUT(7 downto 0) <= GSC_REPLY_DATA_IN(7 downto 0);\r
- \r
+\r
MAKE_RESET_OUT <= make_reset;\r
\r
-- TEST\r
end if;\r
end if;\r
end process PROC_STORE_MAC;\r
- \r
+\r
-- stores incoming TRBnet requests\r
THE_RECEIVE_FIFO: entity work.fifo_2kx9x18_wcnt\r
port map(\r
else\r
DISSECT_NS <= DELAY;\r
end if;\r
- \r
+\r
when WAIT_FOR_LOAD =>\r
state <= x"7";\r
if( PS_SELECTED_IN = '1' ) then\r
\r
-- delay_done <= std_logic(delay_ctr(13));\r
delay_done <= std_logic(delay_ctr(4));\r
- \r
+\r
-- reset request packet detection\r
RESET_DETECTED_PROC: process( CLK )\r
begin\r
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