[-q|--quiet ] : suppress informative output
board operations (no chain parameter given):
- prog_fpga : program FPGA on trb
- start_trbnetd: start trbnet daemon on trb
waitbeforestart_6us: set wait before start time to 6 us
waitbeforestart_1ms: set wait before start time to 1 ms
waitbeforestart_1s: set wait before start time to 1 s
foreach my $board (keys %allboards) {
my %settings=%{$allboards{$board}};
my $chainsini = $settings{'chainsini'};
- my $trbhostname = $settings{'FPGAboard_hostname'};
- my $addonortrb = $settings{'FPGAboard_addonortrb'};
- my $staplfilename = $settings{'FPGAboard_staplfilename'};
my $fpga_addr = any2dec($settings{'FPGAtrbnetAddr'});
- my $conf_period_addr = any2dec($settings{'CONFperiod_trbnetAddr'});
- my $conf_offspillcounter_addr = any2dec($settings{'CONFoffspillcounter_trbnetAddr'});
my $conf_waitstart_addr = any2dec($settings{'CONFwaitstart_trbnetAddr'});
- my $conf_triginitseq_addr = any2dec($settings{'CONFtriginitseq_trbnetAddr'});
- my $conf_trigmapsreset_addr = any2dec($settings{'CONFtrigmapsreset_trbnetAddr'});
- my $conf_trigrunjtag_addr = any2dec($settings{'CONFtrigrunjtag_trbnetAddr'});
- my $conf_trigwriteonce_addr = any2dec($settings{'CONFtrigwriteonce_trbnetAddr'});
- my $conf_trigmapsstart_addr = any2dec($settings{'CONFtrigmapsstart_trbnetAddr'});
if(defined($opt_board) and not defined($opt_chain)) {
# assume board command
my $subr;
- if(("h_".$opt_operation) eq 'h_prog_fpga') {
- $subr = generate_h_prog_fpga($board, $trbhostname, $addonortrb, $staplfilename)
- }
- elsif(("h_".$opt_operation) eq 'h_start_trbnetd'){
- $subr = generate_h_start_trbnetd($board, $trbhostname);
- }
- elsif(("h_".$opt_operation) eq 'h_waitbeforestart_6us' ) {
+ if(("h_".$opt_operation) eq 'h_waitbeforestart_6us' ) {
$subr = generate_h_waitbeforestart_6us($board, $fpga_addr, $conf_waitstart_addr);
}
elsif(("h_".$opt_operation) eq 'h_waitbeforestart_1ms' ) {
$subr = generate_h_waitbeforestart_1s($board, $fpga_addr, $conf_waitstart_addr);
}
elsif(("h_".$opt_operation) eq 'h_trigger_init_sequence' ) {
+ my $conf_triginitseq_addr = any2dec($settings{'CONFtriginitseq_trbnetAddr'});
$subr = generate_h_trig($board, $fpga_addr, $conf_triginitseq_addr);
}
elsif(("h_".$opt_operation) eq 'h_maps_reset' ) {
+ my $conf_trigmapsreset_addr = any2dec($settings{'CONFtrigmapsreset_trbnetAddr'});
$subr = generate_h_trig($board, $fpga_addr, $conf_trigmapsreset_addr);
}
elsif(("h_".$opt_operation) eq 'h_run_jtag' ) {
+ my $conf_trigrunjtag_addr = any2dec($settings{'CONFtrigrunjtag_trbnetAddr'});
$subr = generate_h_trig($board, $fpga_addr, $conf_trigrunjtag_addr);
}
elsif(("h_".$opt_operation) eq 'h_write_once' ) {
+ my $conf_trigwriteonce_addr = any2dec($settings{'CONFtrigwriteonce_trbnetAddr'});
$subr = generate_h_trig($board, $fpga_addr, $conf_trigwriteonce_addr);
}
elsif(("h_".$opt_operation) eq 'h_maps_start' ) {
+ my $conf_trigmapsstart_addr = any2dec($settings{'CONFtrigmapsstart_trbnetAddr'});
$subr = generate_h_trig($board, $fpga_addr, $conf_trigmapsstart_addr);
}
unless ($subr==1) {
my $chain = $opt_chain;
my %chain_settings=%{$allchains{$chain}};
my $chain_fpga_addr = any2dec($chain_settings{'FPGAtrbnetAddr'});
- my $ram_addr = any2dec($chain_settings{'RAMtrbnetAddr'});
my $cmd_reg_addr = any2dec($chain_settings{'CMDreg_trbnetAddr'});
- my $ram_base_addr = any2dec($chain_settings{'RAMbase_trbnetAddr'});
my $data_reg_addr = any2dec($chain_settings{'DATAreg_trbnetAddr'});
- my $conf_signals_addr = any2dec($chain_settings{'CONFsignals_trbnetAddr'});
- my $conf_resetafterfirstwrite_addr = any2dec($chain_settings{'CONFresetafterfirstwrite_trbnetAddr'});
- my $conf_resetbeforeinit_addr = any2dec($chain_settings{'CONFresetbeforeinit_trbnetAddr'});
- my $conf_chain_triginitseq_addr = any2dec($chain_settings{'CONFtriginitseq_trbnetAddr'});
- my $conf_chain_trigmapsreset_addr = any2dec($chain_settings{'CONFtrigmapsreset_trbnetAddr'});
- my $conf_chain_trigrunjtag_addr = any2dec($chain_settings{'CONFtrigrunjtag_trbnetAddr'});
- my $conf_chain_trigwriteonce_addr = any2dec($chain_settings{'CONFtrigwriteonce_trbnetAddr'});
- my $conf_chain_trigmapsstart_addr = any2dec($chain_settings{'CONFtrigmapsstart_trbnetAddr'});
- my $debug_chain_ram1baddr_addr = any2dec($chain_settings{'DEBUGram1baddr'});
- my $debug_chain_ram1bdata_addr = any2dec($chain_settings{'DEBUGram1bdata'});
- my $debug_chain_ram1caddr_addr = any2dec($chain_settings{'DEBUGram1caddr'});
- my $debug_chain_ram1cdata_addr = any2dec($chain_settings{'DEBUGram1cdata'});
- my $chainnr = $chain_settings{'chainnr'};
my $subr;
if(("h_".$opt_operation) eq 'h_man_maps_reset') {
+ my $conf_signals_addr = any2dec($chain_settings{'CONFsignals_trbnetAddr'});
$subr = generate_h_man_maps_reset($chain, $chain_fpga_addr, $conf_signals_addr);
}
elsif(("h_".$opt_operation) eq 'h_delay0' ) {
$subr = generate_h_set_timing_100khz($chain, $chain_fpga_addr,$cmd_reg_addr, $data_reg_addr);
}
elsif(("h_".$opt_operation) eq 'h_set_inout' ) {
+ my $conf_signals_addr = any2dec($chain_settings{'CONFsignals_trbnetAddr'});
$subr = generate_h_set_inout($chain, $chain_fpga_addr, $conf_signals_addr);
}
elsif(("h_".$opt_operation) eq 'h_maps_reset_before_on' ) {
+ my $chainnr = $chain_settings{'chainnr'};
+ my $conf_resetbeforeinit_addr = any2dec($chain_settings{'CONFresetbeforeinit_trbnetAddr'});
$subr = generate_h_maps_reset(1,$chain, $chainnr, $chain_fpga_addr, $conf_resetbeforeinit_addr);
}
elsif(("h_".$opt_operation) eq 'h_maps_reset_before_off' ) {
+ my $chainnr = $chain_settings{'chainnr'};
+ my $conf_resetbeforeinit_addr = any2dec($chain_settings{'CONFresetbeforeinit_trbnetAddr'});
$subr = generate_h_maps_reset(0,$chain, $chainnr, $chain_fpga_addr, $conf_resetbeforeinit_addr);
}
elsif(("h_".$opt_operation) eq 'h_maps_reset_after_on' ) {
+ my $chainnr = $chain_settings{'chainnr'};
+ my $conf_resetafterfirstwrite_addr = any2dec($chain_settings{'CONFresetafterfirstwrite_trbnetAddr'});
$subr = generate_h_maps_reset(1,$chain, $chainnr, $chain_fpga_addr, $conf_resetafterfirstwrite_addr);
}
elsif(("h_".$opt_operation) eq 'h_maps_reset_after_off' ) {
+ my $chainnr = $chain_settings{'chainnr'};
+ my $conf_resetafterfirstwrite_addr = any2dec($chain_settings{'CONFresetafterfirstwrite_trbnetAddr'});
$subr = generate_h_maps_reset(0,$chain, $chainnr, $chain_fpga_addr, $conf_resetafterfirstwrite_addr);
}
elsif(("h_".$opt_operation) eq 'h_maps_clk_on' ) {
+ my $conf_signals_addr = any2dec($chain_settings{'CONFsignals_trbnetAddr'});
$subr = generate_h_maps_clk_signal(1,$chain, $chain_fpga_addr, $conf_signals_addr);
}
elsif(("h_".$opt_operation) eq 'h_maps_clk_off' ) {
+ my $conf_signals_addr = any2dec($chain_settings{'CONFsignals_trbnetAddr'});
$subr = generate_h_maps_clk_signal(0,$chain, $chain_fpga_addr, $conf_signals_addr);
}
elsif(("h_".$opt_operation) eq 'h_trig_init_seq' ) {
+ my $conf_chain_triginitseq_addr = any2dec($chain_settings{'CONFtriginitseq_trbnetAddr'});
$subr = generate_h_chain_trig($chain, $chainnr, $chain_fpga_addr, $conf_chain_triginitseq_addr);
}
elsif(("h_".$opt_operation) eq 'h_maps_reset' ) {
- $subr = generate_h_chain_trig($chain, $chainnr, $chain_fpga_addr, $conf_chain_trigmapsreset_addr);
+ my $conf_chain_trigmapsreset_addr = any2dec($chain_settings{'CONFtrigmapsreset_trbnetAddr'});
+ $subr = generate_h_chain_trig($chain, $chainnr, $chain_fpga_addr, $conf_chain_trigmapsreset_addr);
}
elsif(("h_".$opt_operation) eq 'h_run_jtag' ) {
- $subr = generate_h_chain_trig($chain, $chainnr, $chain_fpga_addr, $conf_chain_trigrunjtag_addr);
+ my $conf_chain_trigrunjtag_addr = any2dec($chain_settings{'CONFtrigrunjtag_trbnetAddr'});
+ $subr = generate_h_chain_trig($chain, $chainnr, $chain_fpga_addr, $conf_chain_trigrunjtag_addr);
}
elsif(("h_".$opt_operation) eq 'h_write_once' ) {
- $subr = generate_h_chain_trig($chain, $chainnr, $chain_fpga_addr, $conf_chain_trigwriteonce_addr);
+ my $conf_chain_trigwriteonce_addr = any2dec($chain_settings{'CONFtrigwriteonce_trbnetAddr'});
+ $subr = generate_h_chain_trig($chain, $chainnr, $chain_fpga_addr, $conf_chain_trigwriteonce_addr);
}
elsif(("h_".$opt_operation) eq 'h_maps_start' ) {
- $subr = generate_h_chain_trig($chain, $chainnr, $chain_fpga_addr, $conf_chain_trigmapsstart_addr);
+ my $conf_chain_trigmapsstart_addr = any2dec($chain_settings{'CONFtrigmapsstart_trbnetAddr'});
+ $subr = generate_h_chain_trig($chain, $chainnr, $chain_fpga_addr, $conf_chain_trigmapsstart_addr);
}
elsif(("h_".$opt_operation) eq 'h_read_ram1b_word' ) {
- $subr = generate_h_read_ram1b_word($chain, $chain_fpga_addr, $debug_chain_ram1baddr_addr, $debug_chain_ram1bdata_addr, $opt_addr);
+ my $debug_chain_ram1baddr_addr = any2dec($chain_settings{'DEBUGram1baddr'});
+ my $debug_chain_ram1bdata_addr = any2dec($chain_settings{'DEBUGram1bdata'});
+ $subr = generate_h_read_ram1b_word($chain, $chain_fpga_addr, $debug_chain_ram1baddr_addr, $debug_chain_ram1bdata_addr, $opt_addr);
}
elsif(("h_".$opt_operation) eq 'h_read_ram1c_word' ) {
- $subr = generate_h_read_ram1c_word($chain, $chain_fpga_addr, $debug_chain_ram1caddr_addr, $debug_chain_ram1cdata_addr, $opt_addr);
+ my $debug_chain_ram1caddr_addr = any2dec($chain_settings{'DEBUGram1caddr'});
+ my $debug_chain_ram1cdata_addr = any2dec($chain_settings{'DEBUGram1cdata'});
+ $subr = generate_h_read_ram1c_word($chain, $chain_fpga_addr, $debug_chain_ram1caddr_addr, $debug_chain_ram1cdata_addr, $opt_addr);
}
elsif(("h_".$opt_operation) eq 'h_copy_ram1b1c' ) {
$subr = generate_h_copy_ram1b1c($chain, $chain_fpga_addr, $cmd_reg_addr, $data_reg_addr);