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Make regions larger, maybe that's enough to get par working
authorAndreas Neiser <neiser@kph.uni-mainz.de>
Fri, 29 May 2015 10:17:33 +0000 (12:17 +0200)
committerAndreas Neiser <neiser@kph.uni-mainz.de>
Sat, 13 Jun 2015 15:37:06 +0000 (17:37 +0200)
ADC/trb3_periph_adc_constraints.lpf patch | blob | history

diff --git a/ADC/trb3_periph_adc_constraints.lpf b/ADC/trb3_periph_adc_constraints.lpf
index fd46a72a91a270210d448fbea447df734f69b727..f4f2ea8b6dc96e2c72f8f82bbfe416fe07cdc4cd 100644 (file)
--- a/ADC/trb3_periph_adc_constraints.lpf
+++ b/ADC/trb3_periph_adc_constraints.lpf
@@ -130,7 +130,7 @@ LOCATE UGROUP "THE_ADC_PROC_cfd_7_group" REGION "THE_ADC_PROC_cfd_7_region";
 
 # right are ADCs 6 and 8-11 (counted from 0)
 UGROUP "THE_ADC_RIGHT_group" BLKNAME gen_reallogic.THE_ADC/THE_ADC_RIGHT;
-REGION "THE_ADC_RIGHT_region" "R57C137D" 9 45;
+REGION "THE_ADC_RIGHT_region" "R57C124D" 9 58;
 LOCATE UGROUP "THE_ADC_RIGHT_group" REGION "THE_ADC_RIGHT_region";
 
 UGROUP "THE_ADC_PROC_cfd_6_group" BLKNAME gen_reallogic.THE_ADC/gen_readout_cfd.gen_processors.6.THE_ADC_PROC;
TRB3 VHDL