Update to trb3sc_tdctemplate

diff --git a/scripts/nodes_frankfurt.txt b/scripts/nodes_frankfurt.txt
index 80ee4264a92d793450a69b8dac878a5b30b9b48e..5bf93eb449315ca1bed999a97a40476df82652a3 100644 (file)
--- a/scripts/nodes_frankfurt.txt
+++ b/scripts/nodes_frankfurt.txt
@@ -2,12 +2,12 @@
 
 [jspc29]
 SYSTEM = linux
-CORENUM = 2
-ENV = /d/jspc29/lattice/36_settings.sh
+CORENUM = 3
+ENV = /d/jspc29/lattice/37_settings.sh
 WORKDIR = /d/jspc22/trb/git/trb3sc/tdctemplate/workdir
 
 [jspc57]
 SYSTEM = linux
-CORENUM = 6
-ENV = /d/jspc29/lattice/36_settings.sh
+CORENUM = 7
+ENV = /d/jspc29/lattice/37_settings.sh
 WORKDIR = /d/jspc22/trb/git/trb3sc/tdctemplate/workdir

diff --git a/tdctemplate/config.vhd b/tdctemplate/config.vhd
index 4ee78d9fe6f0f52d5ea86add71fdd5ceabcf312a..731053aca769c0b67de720edfff3af92d8d527cb 100644 (file)
--- a/tdctemplate/config.vhd
+++ b/tdctemplate/config.vhd
@@ -28,7 +28,7 @@ package config is
 --Runs with 120 MHz instead of 100 MHz     
     constant USE_120_MHZ            : integer := c_NO; 
     constant USE_EXTERNAL_CLOCK     : integer := c_YES; --'no' not implemented.
-    constant CLOCK_FAST_SELECT        : integer := c_NO; --fast clock select (135us) or slow (280ms)?
+    constant CLOCK_FAST_SELECT      : integer := c_NO; --fast clock select (135us) or slow (280ms)?
     
 --Use sync mode, RX clock for all parts of the FPGA
     constant USE_RXCLOCK            : integer := c_NO;

diff --git a/tdctemplate/trb3sc_tdctemplate.lpf b/tdctemplate/trb3sc_tdctemplate.lpf
index a5f0b63bbb757476f4a5b0dce68b0fbb795dd82a..628640739abeef602ccfe5cbe4848bbd32d98f61 100644 (file)
--- a/tdctemplate/trb3sc_tdctemplate.lpf
+++ b/tdctemplate/trb3sc_tdctemplate.lpf
@@ -1,8 +1,8 @@
-#MULTICYCLE FROM CLKNET "clk_sys" TO CLKNET "clk_full_osc" 1 X ;
-#MULTICYCLE FROM CLKNET "clk_full_osc" TO CLKNET "clk_sys" 2 X ;
+# MULTICYCLE FROM CLKNET "clk_sys" TO CLKNET "clk_full_osc" 1 X ;
+# MULTICYCLE FROM CLKNET "clk_full_osc" TO CLKNET "clk_sys" 2 X ;
 
-#MULTICYCLE FROM CELL "THE_TDC/GEN_Channels*Channels/Channel200/RingBuffer*FIFO/*" CLKNET clk_full_osc TO CELL "THE_TDC/GEN_Channels*Channels/Channel200/RingBuffer*FIFO/*" CLKNET clk_sys 2x;
-#MULTICYCLE FROM CELL "THE_TDC/ReferenceChannel/Channel200/RingBuffer*FIFO/*" CLKNET clk_full_osc TO CELL "THE_TDC/ReferenceChannel/Channel200/RingBuffer*FIFO/*" CLKNET clk_sys 2x;
+MULTICYCLE FROM CELL "THE_CLOCK_RESET/THE_RESET_HANDLER/final_reset*" CLKNET clk_sys TO CLKNET clk_sys 5x;
+MULTICYCLE FROM CELL "THE_CLOCK_RESET/THE_RESET_HANDLER/final_reset*" CLKNET clk_sys TO CELL "THE_TDC/*Channe*/Channel200/RingBuffer*FIFO/*" 5x;
+
+MULTICYCLE FROM CELL "THE_TDC/reset_tdc*" TO CLKNET clk_full_osc 2x;
 
-#MULTICYCLE FROM CELL "THE_CLOCK_RESET/THE_RESET_HANDLER/final_reset*" CLKNET clk_sys TO CLKNET clk_sys 5x;
-#MULTICYCLE FROM CELL "THE_TDC/reset_tdc*" TO CLKNET clk_full_osc 2x;

diff --git a/tdctemplate/trb3sc_tdctemplate.vhd b/tdctemplate/trb3sc_tdctemplate.vhd
index 7771f95f11c52af41f9d674d7636b59a76935d1a..7f5359c36ec50650be7558bed8eb54b0a3dbe9cc 100644 (file)
--- a/tdctemplate/trb3sc_tdctemplate.vhd
+++ b/tdctemplate/trb3sc_tdctemplate.vhd
@@ -222,12 +222,12 @@ begin
       TX_DLM_WORD => open,
 
       --SFP Connection
-      SD_RXD_P_IN    => SERDES_RX(0),
-      SD_RXD_N_IN    => SERDES_RX(1),
-      SD_TXD_P_OUT   => SERDES_TX(0),
-      SD_TXD_N_OUT   => SERDES_TX(1),
-      SD_REFCLK_P_IN => '0',
-      SD_REFCLK_N_IN => '0',
+--       SD_RXD_P_IN    => SERDES_RX(0),
+--       SD_RXD_N_IN    => SERDES_RX(1),
+--       SD_TXD_P_OUT   => SERDES_TX(0),
+--       SD_TXD_N_OUT   => SERDES_TX(1),
+--       SD_REFCLK_P_IN => '0',
+--       SD_REFCLK_N_IN => '0',
       SD_PRSNT_N_IN  => SFP_MOD0(1),
       SD_LOS_IN      => SFP_LOS(1),
       SD_TXDIS_OUT   => SFP_TX_DIS(1),