updated SPI interface description

diff --git a/trb3/DacProgramming.tex b/trb3/DacProgramming.tex
index 318f29f5fbbd62d753724e53dd1f18e9ce26cb84..c22c8d524bb1a503709bf46d83d1c9792dca02b9 100644 (file)
--- a/trb3/DacProgramming.tex
+++ b/trb3/DacProgramming.tex
@@ -60,6 +60,21 @@ The ASCII format is shown below, the commands can be found in table~\ref{ltc2600
  \item Example Configuration: daqtools/config/DAC\_config.db
 \end{itemize*}
 
+\paragraph*{Registers}~\\
+
+\begin{tabular}{c|c|l}
+ 0xd40N & Data & 16 places for SPI commands \\
+ 0xd410 & Chip Select & CS output, one bit for each of the 15 outputs, positive logic\\
+ 0xd411 & Control & Control register. See next paragraph\\
+ 0xd412 & Readback & Data received on SPI\\
+ 0xd413 & Master & Block SPI for other use. See next paragraph\\ 
+ 0xd414 & Clear & Additional output to connect to a CLR-input on SPI devices\\
+ 0xd418 & Invert & Set lowest bit to invert all outputs\\
+ 0xd419 & Word Length & Number of bits of a SPI word, default: 32\\
+ 0xd41a & Period & Half period of a SPI clock cycle, in system clocks. default: 7\\
+ 
+\end{tabular}
+
 \paragraph*{Collisions during reading}
 Writing to all registers is blocked while a transfer is in progress, i.e. writing can not be broken.
 Reading back a value can break, if to processes access the SPI port in a interleaved manner, because reading the read-back register is non-atomic.