CLK => clk_100_i,
TEST_CLK => '0',
CLK_125_IN => CLK_GPLL_RIGHT,
- RESET => reset_i,
+ RESET => reset_i_temp,
GSR_N => gsr_n,
--Debug
STAGE_STAT_REGS_OUT => open, --stage_stat_regs, -- should be come STATUS or similar
\r
\r
REGION "GBE_REGION" "R40C2D" 35 40 DEVSIZE;\r
-REGION "MED0" "R75C2D" 30 35 DEVSIZE;\r
+REGION "MED0" "R70C2D" 35 40 DEVSIZE;\r
LOCATE UGROUP "gbe_rx_tx" REGION "GBE_REGION" ;\r
FREQUENCY NET "gen_ethernet_hub_GBE/imp_gen_serdes_intclk_gen_PCS_SERDES/un1_PCS_SERDES_1" 125.000000 MHz ;\r
FREQUENCY NET "gen_ethernet_hub_GBE/serdes_clk_125_c" 125.000000 MHz ;\r