add_file -vhdl -lib work "../../trbnet/special/spi_slim.vhd"
add_file -vhdl -lib work "../../trbnet/special/spi_master.vhd"
add_file -vhdl -lib work "../../trbnet/special/spi_databus_memory.vhd"
-add_file -vhdl -lib work "../../trbnet/special/spi_ltc2600.vhd"
+add_file -vhdl -lib work "../../trbnet/special/spi_ltc2600_singleoutput.vhd"
add_file -vhdl -lib work "../../trbnet/optical_link/f_divider.vhd"
add_file -vhdl -lib work "../../trbnet/media_interfaces/ecp3_sfp/sfp_1_200_int.vhd"
MED_READ_IN => '1',
REFCLK2CORE_OUT => open,
--SFP Connection
- SD_RXD_P_IN => SERDES_INT_RX(2),
- SD_RXD_N_IN => SERDES_INT_RX(3),
- SD_TXD_P_OUT => SERDES_INT_TX(2),
- SD_TXD_N_OUT => SERDES_INT_TX(3),
- SD_REFCLK_P_IN => open,
- SD_REFCLK_N_IN => open,
+-- SD_RXD_P_IN => SERDES_INT_RX(2),
+-- SD_RXD_N_IN => SERDES_INT_RX(3),
+-- SD_TXD_P_OUT => SERDES_INT_TX(2),
+-- SD_TXD_N_OUT => SERDES_INT_TX(3),
+-- SD_REFCLK_P_IN => open,
+-- SD_REFCLK_N_IN => open,
SD_PRSNT_N_IN => FPGA5_COMM(0),
SD_LOS_IN => FPGA5_COMM(0),
SD_TXDIS_OUT => FPGA5_COMM(2),
-- SPI
-------------------------------------------------------------------------------
- FPGA_SPI : spi_ltc2600
+ FPGA_SPI : entity work.spi_ltc2600
generic map (
BITS => 32,
WAITCYCLES => 15)