add_file -vhdl -lib work "../../TOMcat/code/clock_reset_handler.vhd"
add_file -vhdl -lib work "../../trbnet/special/trb_net_reset_handler.vhd"
add_file -vhdl -lib work "../../trbnet/special/spi_flash_and_fpga_reload_record.vhd"
-#add_file -vhdl -lib work "../../dirich/code/sedcheck.vhd"
-add_file -vhdl -lib work "../../vhdlbasics/ecp5/sedcheck.vhd"
#Fifos
add_file -vhdl -lib work "../../trbnet/lattice/ecp5/trb_net16_fifo_arch.vhd"
add_file -vhdl -lib work "../../trbnet/lattice/ecp5/FIFO/fifo_18x1k_oreg/fifo_18x1k_oreg.vhd"
add_file -vhdl -lib work "../../trbnet/lattice/ecp5/FIFO/fifo_18x2k_oreg/fifo_18x2k_oreg.vhd"
add_file -vhdl -lib work "../../trbnet/lattice/ecp5/FIFO/fifo_9x2k_oreg/fifo_9x2k_oreg.vhd"
-add_file -vhdl -lib work "../../trbnet/lattice/ecp2m/fifo/fifo_var_oreg.vhd"
add_file -vhdl -lib work "../../trbnet/lattice/ecp5/FIFO/fifo_19x16_obuf/fifo_19x16_obuf.vhd"
add_file -vhdl -lib work "../../trbnet/lattice/ecp5/FIFO/lattice_ecp5_fifo_16x16_dualport/lattice_ecp5_fifo_16x16_dualport.vhd"
add_file -vhdl -lib work "../../trbnet/lattice/ecp5/FIFO/lattice_ecp5_fifo_18x16_dualport/lattice_ecp5_fifo_18x16_dualport.vhd"
add_file -vhdl -lib work "../../trbnet/lattice/ecp5/FIFO/lattice_ecp3_fifo_18x16_dualport_oreg/lattice_ecp3_fifo_18x16_dualport_oreg.vhd"
-
#Flash & Reload, Tools
add_file -vhdl -lib work "../../trbnet/special/slv_register.vhd"
add_file -vhdl -lib work "../../trbnet/special/spi_master.vhd"
add_file -vhdl -lib work "../../trbnet/special/spi_databus_memory.vhd"
add_file -vhdl -lib work "../../trbnet/special/fpga_reboot.vhd"
add_file -vhdl -lib work "../../TOMcat/code/tomcat_tools.vhd"
-add_file -vhdl -lib work "../../trb3sc/code/lcd.vhd"
add_file -vhdl -lib work "../../trb3sc/code/debuguart.vhd"
add_file -vhdl -lib work "../../trbnet/special/uart.vhd"
add_file -vhdl -lib work "../../trbnet/special/uart_rec.vhd"
add_file -vhdl -lib work "../../trbnet/special/uart_trans.vhd"
-add_file -vhdl -lib work "../../trbnet/special/spi_ltc2600.vhd"
-add_file -vhdl -lib work "../../trbnet/optical_link/f_divider.vhd"
add_file -vhdl -lib work "../../trb3sc/code/load_settings.vhd"
add_file -vhdl -lib work "../../trb3sc/code/spi_master_generic.vhd"
-add_file -vhdl -lib work "../../trb3/base/code/input_to_trigger_logic_record.vhd"
-add_file -vhdl -lib work "../../trb3/base/code/input_statistics.vhd"
+add_file -vhdl -lib work "../../vhdlbasics/interface/i2c_gstart2.vhd"
+add_file -vhdl -lib work "../../vhdlbasics/interface/i2c_sendb2.vhd"
+add_file -vhdl -lib work "../../vhdlbasics/interface/i2c_slim2.vhd"
+add_file -vhdl -lib work "../../trbnet/special/trb_net_i2cwire2.vhd"
#SlowControl files
add_file -vhdl -lib work "../../trbnet/trb_net16_regio_bus_handler.vhd"
add_file -vhdl -lib work "../../trbnet/trb_net16_regio_bus_handler_record.vhd"
add_file -vhdl -lib work "../../trbnet/trb_net16_regIO.vhd"
-add_file -vhdl -lib work "../../trbnet/trb_net_onewire.vhd"
add_file -vhdl -lib work "../../trbnet/trb_net16_addresses.vhd"
#Media interface
add_file -vhdl -lib work "../../trbnet/media_interfaces/sync/med_sync_define_RS.vhd"
-add_file -vhdl -lib work "../../trbnet/media_interfaces/sync/rx_control_RS.vhd"
-add_file -vhdl -lib work "../../trbnet/media_interfaces/sync/tx_control_RS.vhd"
add_file -vhdl -lib work "../../trbnet/media_interfaces/sync/main_rx_reset_RS.vhd"
add_file -vhdl -lib work "../../trbnet/media_interfaces/sync/main_tx_reset_RS.vhd"
-add_file -vhdl -lib work "../../trbnet/media_interfaces/sync/sci_reader_RS.vhd"
-add_file -vhdl -lib work "../../trbnet/media_interfaces/sync/med_sync_control_RS.vhd"
-add_file -vhdl -lib work "../../trbnet/media_interfaces/med_ecp5_sfp_sync_RS.vhd"
-
-#########################################
-#add_file -vhdl -lib work "../../trbnet/media_interfaces/ecp5/chan0_0_inv/serdes_sync_0.vhd"
-# 125MHz files
-add_file -vhdl -lib work "../../trbnet/media_interfaces/ecp5/pcs_125M.vhd"
-add_file -vhdl -lib work "../../trbnet/media_interfaces/ecp5/chan0_0_125M_inv_5G/serdes_sync_0_125M.vhd"
-add_file -verilog -lib work "../../trbnet/media_interfaces/ecp5/serdes_sync_0_125M_softlogic.v"
-# 200MHz files
-add_file -vhdl -lib work "../../trbnet/media_interfaces/ecp5/pcs_200M.vhd"
-add_file -vhdl -lib work "../../trbnet/media_interfaces/ecp5/chan0_0_200M_inv_5G/serdes_sync_0_200M.vhd"
-add_file -verilog -lib work "../../trbnet/media_interfaces/ecp5/serdes_sync_0_200M_softlogic.v"
-##########################################
-
-#add_file -vhdl -lib work "../../trbnet/media_interfaces/ecp5/pcs.vhd"
-#add_file -verilog -lib work "../../trbnet/media_interfaces/ecp5/serdes_sync_0_softlogic.v"
-
-add_file -vhdl -lib work "../../trbnet/media_interfaces/ecp5/pcs2.vhd"
-
-add_file -vhdl -lib work "../../trbnet/trb_net16_endpoint_hades_full_gbe.vhd"
-add_file -vhdl -lib work "../../trbnet/trb_net16_endpoint_standalone_sctrl.vhd"
#TrbNet Endpoint
add_file -vhdl -lib work "../../trbnet/trb_net16_term_buf.vhd"
add_file -vhdl -lib work "../../trbnet/basics/ram_dp_rw.vhd"
add_file -vhdl -lib work "../../trbnet/basics/pulse_stretch.vhd"
-add_file -vhdl -lib work "../../trbnet/special/handler_lvl1.vhd"
-add_file -vhdl -lib work "../../trbnet/special/handler_data.vhd"
-add_file -vhdl -lib work "../../trbnet/special/handler_ipu.vhd"
-add_file -vhdl -lib work "../../trbnet/special/handler_trigger_and_data.vhd"
-add_file -vhdl -lib work "../../trbnet/trb_net16_endpoint_hades_full_handler_record.vhd"
-add_file -vhdl -lib work "../../trbnet/special/bus_register_handler.vhd"
-
-add_file -vhdl -lib work "../../trbnet/special/trb_net_i2cwire.vhd"
-add_file -vhdl -lib work "../../vhdlbasics/interface/i2c_gstart.vhd"
-add_file -vhdl -lib work "../../vhdlbasics/interface/i2c_sendb.vhd"
-add_file -vhdl -lib work "../../vhdlbasics/interface/i2c_slim.vhd"
-
-add_file -vhdl -lib work "../../vhdlbasics/interface/i2c_gstart2.vhd"
-add_file -vhdl -lib work "../../vhdlbasics/interface/i2c_sendb2.vhd"
-add_file -vhdl -lib work "../../vhdlbasics/interface/i2c_slim2.vhd"
-add_file -vhdl -lib work "../../trbnet/special/trb_net_i2cwire2.vhd"
-
-add_file -vhdl -lib work "tdc_release/tdc_components.vhd"
-add_file -vhdl -lib work "tdc_release/bit_sync.vhd"
-add_file -vhdl -lib work "tdc_release/BusHandler_record.vhd"
-add_file -vhdl -lib work "tdc_release/Channel_200.vhd"
-add_file -vhdl -lib work "tdc_release/Channel.vhd"
-add_file -vhdl -lib work "tdc_release/Encoder_288_Bit.vhd"
-add_file -vhdl -lib work "tdc_release/fallingEdgeDetect.vhd"
-add_file -vhdl -lib work "tdc_release/hit_mux.vhd"
-add_file -vhdl -lib work "tdc_release/LogicAnalyser.vhd"
-add_file -vhdl -lib work "tdc_release/Readout_record.vhd"
-add_file -vhdl -lib work "tdc_release/risingEdgeDetect.vhd"
-add_file -vhdl -lib work "tdc_release/ROM_encoder_ecp5.vhd"
-add_file -vhdl -lib work "tdc_release/ShiftRegisterSISO.vhd"
-add_file -vhdl -lib work "tdc_release/Stretcher_A.vhd"
-add_file -vhdl -lib work "tdc_release/Stretcher_B.vhd"
-add_file -vhdl -lib work "tdc_release/Stretcher.vhd"
-add_file -vhdl -lib work "tdc_release/TDC_record.vhd"
-add_file -vhdl -lib work "tdc_release/TriggerHandler.vhd"
-add_file -vhdl -lib work "tdc_release/up_counter.vhd"
-
-add_file -vhdl -lib work "../../tdc/base/cores/ecp5/TDC/Adder_288/Adder_288.vhd"
-add_file -vhdl -lib work "../../tdc/base/cores/ecp5/FIFO/FIFO_DC_36x128_DynThr_OutReg/FIFO_DC_36x128_DynThr_OutReg.vhd"
-add_file -vhdl -lib work "../../tdc/base/cores/ecp5/FIFO/FIFO_DC_36x128_OutReg/FIFO_DC_36x128_OutReg.vhd"
-add_file -vhdl -lib work "../../tdc/base/cores/ecp5/FIFO/FIFO_DC_36x64_OutReg/FIFO_DC_36x64_OutReg.vhd"
-add_file -vhdl -lib work "../../tdc/base/cores/ecp5/FIFO/FIFO_DC_36x32_OutReg/FIFO_DC_36x32_OutReg.vhd"
-add_file -vhdl -lib work "../../tdc/base/cores/ecp5/FIFO/FIFO_36x128_OutReg/FIFO_36x128_OutReg.vhd"
-add_file -vhdl -lib work "../../tdc/base/cores/ecp5/FIFO/FIFO_36x64_OutReg/FIFO_36x64_OutReg.vhd"
-add_file -vhdl -lib work "../../tdc/base/cores/ecp5/FIFO/FIFO_36x32_OutReg/FIFO_36x32_OutReg.vhd"
-add_file -vhdl -lib work "../../tdc/base/cores/ecp5/PLL/pll_in125_out50/pll_in125_out50.vhd"
-#add_file -vhdl -lib work "../../tdc/base/cores/ecp5/PLL/pll_in3125_out50/pll_in3125_out50.vhd"
+add_file -vhdl -lib work "../../trbnet/trb_net16_endpoint_standalone_sctrl.vhd"
#GbE
add_file -vhdl -lib work "../../trbnet/gbe_trb_ecp5/base/gbe_wrapper_single.vhd"
#add_file -vhdl -lib work "../../trbnet/gbe_trb_ecp5/media/ecp5-5g/d1ch0/serdes_gbe.vhd"
#add_file -vhdl -lib work "../../trbnet/gbe_trb_ecp5/media/ecp5-5g/d1ch1/serdes_gbe.vhd"
-#add_file -vhdl -lib work "../../trbnet/gbe_trb/ipcores/ecp5/fifo_8kx9.vhd"
add_file -vhdl -lib work "../../trbnet/gbe_trb/ipcores/ecp5/fifo_4096x9.vhd"
add_file -vhdl -lib work "../../trbnet/gbe_trb/ipcores/ecp5/fifo_512x32.vhd"
-#add_file -vhdl -lib work "../../trbnet/gbe_trb/ipcores/ecp5/fifo_512x32x8.vhd"
add_file -vhdl -lib work "../../trbnet/gbe_trb/ipcores/ecp5/fifo_512x72.vhd"
-#add_file -vhdl -lib work "../../trbnet/gbe_trb/ipcores/ecp5/fifo_64kx9.vhd"
-#add_file -vhdl -lib work "../../trbnet/gbe_trb/ipcores/ecp5/fifo_64kx9_af.vhd"
-#add_file -vhdl -lib work "../../trbnet/gbe_trb/ipcores/ecp5/fifo_32kx16x8_mb2.vhd"
-#add_file -vhdl -lib work "../../trbnet/gbe_trb/ipcores/ecp5/fifo_2048x8x16.vhd"
-#add_file -vhdl -lib work "../../trbnet/gbe_trb/ipcores/ecp5/fifo_65536x18x9.vhd"
-#add_file -vhdl -lib work "../../trbnet/gbe_trb/ipcores/ecp5/slv_mac_memory.vhd"
-#add_file -vhdl -lib work "../../trbnet/gbe_trb/ipcores/ecp5/ip_mem.vhd"
add_file -vhdl -lib work "../../trbnet/gbe_trb/ipcores/ecp5/fifo_64kx18x9_wcnt.vhd"
add_file -vhdl -lib work "../../trbnet/gbe_trb/ipcores/ecp5/fifo_32kx18x9_wcnt.vhd"
add_file -vhdl -lib work "../../trbnet/gbe_trb/ipcores/ecp5/fifo_64kx9_af_cnt.vhd"
add_file -vhdl -lib work "../../trbnet/gbe_trb/ipcores/ecp5/fifo_2kx9x18_wcnt.vhd"
add_file -vhdl -lib work "../../trbnet/gbe_trb/ipcores/ecp5/fifo_4kx18x9_wcnt.vhd"
-
add_file -vhdl -lib work "./tomcat_gbe.vhd"
-- Trigger
TRIGGER_IN => '0',
-- SFP
- SD_PRSNT_N_IN => SFP_MOD_0,
- SD_LOS_IN => SFP_LOS,
- SD_TXDIS_OUT => SFP_TX_DIS,
- -- trigger channel
- -- only for LINK_HAS_READOUT
- CTS_NUMBER_IN => (others => '0'),
- CTS_CODE_IN => (others => '0'),
- CTS_INFORMATION_IN => (others => '0'),
- CTS_READOUT_TYPE_IN => (others => '0'),
- CTS_START_READOUT_IN => '0',
- CTS_DATA_OUT => open,
- CTS_DATAREADY_OUT => open,
- CTS_READOUT_FINISHED_OUT => open,
- CTS_READ_IN => '1',
- CTS_LENGTH_OUT => open,
- CTS_ERROR_PATTERN_OUT => open,
- -- data channel
- -- only for LINK_HAS_READOUT
- FEE_DATA_IN => (others => '0'),
- FEE_DATAREADY_IN => '0',
- FEE_READ_OUT => open,
- FEE_STATUS_BITS_IN => (others => '0'),
- FEE_BUSY_IN => '0',
+ SD_PRSNT_N_IN(0) => SFP_MOD_0,
+ SD_LOS_IN(0) => SFP_LOS,
+ SD_TXDIS_OUT(0) => SFP_TX_DIS,
-- unique adresses
MC_UNIQUE_ID_IN => timer.uid,
MY_TRBNET_ADDRESS_IN => timer.network_address,
BUS_IP_TX => busgbeip_tx, -- registers inside GbE
BUS_REG_RX => busgbereg_rx, -- registers inside GbE
BUS_REG_TX => busgbereg_tx, -- registers inside GbE
- -- Forwarder
- FWD_DST_MAC_IN => (others => '0'),
- FWD_DST_IP_IN => (others => '0'),
- FWD_DST_UDP_IN => (others => '0'),
- FWD_DATA_IN => (others => '0'),
- FWD_DATA_VALID_IN => '0',
- FWD_SOP_IN => '0',
- FWD_EOP_IN => '0',
- FWD_READY_OUT => open,
- FWD_FULL_OUT => open,
- -- reset
+ -- reset
MAKE_RESET_OUT => reset_via_gbe, -- reset by GbE
-- debug and status
STATUS_OUT => status,
debug(6 downto 4) <= gsc_init_packet_num; -- is shifted
debug(7) <= gsc_init_dataready;
debug(8) <= gsc_init_read;
- debug(9) <= '0';
+ debug(9) <= timer.tick_ms; --'0';
debug(13 downto 10) <= gsc_reply_data(3 downto 0);
debug(16 downto 14) <= gsc_reply_packet_num;
debug(17) <= gsc_reply_dataready;
-- LED
-------------------------------------------------------------------------------
LED_SFP_GREEN <= not (status(0) and status(1) and status(2)); --'0';
- LED_SFP_YELLOW <= not (status(3) or status(4)); --'0';
+ LED_SFP_YELLOW <= not status(5); --'0';
LED_SFP_RED <= not status(8); --'0';
- LED(3) <= not common_ctrl_reg(3); --'0';
- LED(2) <= not common_ctrl_reg(2); --'0';
- LED(1) <= not common_ctrl_reg(1); --'0';
- LED(0) <= not common_ctrl_reg(0); --'0';
+ LED(3) <= not additional_reg(31); --'0';
+ LED(2) <= not additional_reg(30); --'0';
+ LED(1) <= not additional_reg(29); --'0';
+ LED(0) <= not additional_reg(28); --'0';
-- 0 red
-- 1 orange