fix syntax for LEDs in padiwa amps 2

diff --git a/amps2/padiwa_amps2.vhd b/amps2/padiwa_amps2.vhd
index 7a4a4a93da8742b641bb8699624f72e4a7a6ffaa..2d58c64cd63351cb3c55b0c9c537bb705440f053 100644 (file)
--- a/amps2/padiwa_amps2.vhd
+++ b/amps2/padiwa_amps2.vhd
@@ -362,7 +362,7 @@ THE_PWM_GEN : entity work.pwm_generator
 --    wait until rising_edge(clk_i);\r
     wait until rising_edge(clk_66);\r
     for i in 1 to 8 loop\r
-      if (last_inp((i-1)*2) xor inp_status((i-1)*2) = '1' and (led_timer(i)(23 downto 21) > 0) then\r
+      if (last_inp((i-1)*2) xor inp_status((i-1)*2)) = '1' and (led_timer(i)(23 downto 21) > 0) then\r
         led_state(i) <= not led_state(i);\r
         led_timer(i) <= 0;\r
       elsif led_timer(i)(23) = '1' then\r
@@ -374,7 +374,7 @@ THE_PWM_GEN : entity work.pwm_generator
   end process;  \r
 \r
 gen_leds : for i in 1 to 8 generate\r
-  LED(i) <= not leds((i-1)*2) when led_status(8) = '1' else not led_status(i-1);\r
+  LED(i) <= not led_state(i) when led_status(8) = '1' else not led_status(i-1);\r
 end generate;\r
 \r
   \r
@@ -453,9 +453,9 @@ last_inp_long_reg <= inp_long_reg when rising_edge(clk_i);
 -- Test Output\r
 ---------------------------------------------------------------------------  \r
   --TEST_LINE(7 downto 0)  <= selected_delay;\r
-  TEST_LINE(13) <= SPI_CLK;\r
-  TEST_LINE(12) <= SPI_out;\r
-  TEST_LINE(11) <= SPI_in;\r
+--   TEST_LINE(13) <= SPI_CLK;\r
+--   TEST_LINE(12) <= SPI_out;\r
+--   TEST_LINE(11) <= SPI_in;\r
   \r
   TEST_LINE(10 downto 8) <= (others => '0');\r
 end architecture;\r