From: Jan Michel <j.michel@gsi.de>
Date: Tue, 3 Mar 2015 16:42:52 +0000 (+0100)
Subject: adjust uart output driver
X-Git-Url: https://jspc29.x-matter.uni-frankfurt.de/git/?a=commitdiff_plain;h=018c20d9c8f73176aa3694af150a985d63760b67;p=trb3.git

adjust uart output driver
---

diff --git a/base/trb3_central_cts.lpf b/base/trb3_central_cts.lpf
index ef0c710..0c6ec46 100644
--- a/base/trb3_central_cts.lpf
+++ b/base/trb3_central_cts.lpf
@@ -74,7 +74,7 @@ LOCATE COMP  "CLKRJ_1"   SITE "U8";
 LOCATE COMP  "CLKRJ_2"   SITE "Y34";
 LOCATE COMP  "CLKRJ_3"   SITE "Y33"; 
 DEFINE PORT GROUP "CLKRJ_group" "CLKRJ*" ;
-IOBUF GROUP  "CLKRJ_group" IO_TYPE=LVCMOS25 PULLMODE=NONE DRIVE=4;
+IOBUF GROUP  "CLKRJ_group" IO_TYPE=LVCMOS25 PULLMODE=UP DRIVE=12;
 
 #################################################################
 # Clock and Trigger Select