From: Andreas Neiser <neiser@kph.uni-mainz.de>
Date: Thu, 22 May 2014 16:05:07 +0000 (+0200)
Subject: Adding bus_register_handler.vhd to the project files
X-Git-Url: https://jspc29.x-matter.uni-frankfurt.de/git/?a=commitdiff_plain;h=02901888d41302598efd2521577a08ae8bb0d122;p=trb3.git

Adding bus_register_handler.vhd to the project files
---

diff --git a/ADC/trb3_periph_adc.prj b/ADC/trb3_periph_adc.prj
index cc1ecef..620e912 100644
--- a/ADC/trb3_periph_adc.prj
+++ b/ADC/trb3_periph_adc.prj
@@ -102,6 +102,7 @@ add_file -vhdl -lib work "../../trbnet/special/handler_trigger_and_data.vhd"
 add_file -vhdl -lib work "../../trbnet/special/trb_net_reset_handler.vhd"
 add_file -vhdl -lib work "../../trbnet/trb_net16_endpoint_hades_full_handler.vhd"
 add_file -vhdl -lib work "../../trbnet/special/fpga_reboot.vhd"
+add_file -vhdl -lib work "../../trbnet/special/bus_register_handler.vhd"
 
 add_file -vhdl -lib work "../../trbnet/lattice/ecp3/lattice_ecp3_fifo_18x1k.vhd"
 add_file -vhdl -lib work "../../trbnet/lattice/ecp3/trb_net16_fifo_arch.vhd"
diff --git a/base/trb3_periph.prj b/base/trb3_periph.prj
index 9709709..cf17f00 100644
--- a/base/trb3_periph.prj
+++ b/base/trb3_periph.prj
@@ -101,6 +101,7 @@ add_file -vhdl -lib work "../../trbnet/special/handler_trigger_and_data.vhd"
 add_file -vhdl -lib work "../../trbnet/special/trb_net_reset_handler.vhd"
 add_file -vhdl -lib work "../../trbnet/trb_net16_endpoint_hades_full_handler.vhd"
 add_file -vhdl -lib work "../../trbnet/special/fpga_reboot.vhd"
+add_file -vhdl -lib work "../../trbnet/special/bus_register_handler.vhd"
 
 add_file -vhdl -lib work "../../trbnet/lattice/ecp3/lattice_ecp3_fifo_18x1k.vhd"
 add_file -vhdl -lib work "../../trbnet/lattice/ecp3/trb_net16_fifo_arch.vhd"
diff --git a/cbmrich/cbmrich.prj b/cbmrich/cbmrich.prj
index d78e817..517d923 100644
--- a/cbmrich/cbmrich.prj
+++ b/cbmrich/cbmrich.prj
@@ -101,6 +101,7 @@ add_file -vhdl -lib work "../../trbnet/special/handler_trigger_and_data.vhd"
 add_file -vhdl -lib work "../../trbnet/special/trb_net_reset_handler.vhd"
 add_file -vhdl -lib work "../../trbnet/trb_net16_endpoint_hades_full_handler.vhd"
 add_file -vhdl -lib work "../../trbnet/special/fpga_reboot.vhd"
+add_file -vhdl -lib work "../../trbnet/special/bus_register_handler.vhd"
 
 add_file -vhdl -lib work "../../trbnet/lattice/ecp3/lattice_ecp3_fifo_18x1k.vhd"
 add_file -vhdl -lib work "../../trbnet/lattice/ecp3/trb_net16_fifo_arch.vhd"
diff --git a/cbmtof/cbmtof.prj b/cbmtof/cbmtof.prj
index cef2ae5..511cd10 100644
--- a/cbmtof/cbmtof.prj
+++ b/cbmtof/cbmtof.prj
@@ -103,6 +103,7 @@ add_file -vhdl -lib work "../../trbnet/special/handler_trigger_and_data.vhd"
 add_file -vhdl -lib work "../../trbnet/special/trb_net_reset_handler.vhd"
 add_file -vhdl -lib work "../../trbnet/trb_net16_endpoint_hades_full_handler.vhd"
 add_file -vhdl -lib work "../../trbnet/special/fpga_reboot.vhd"
+add_file -vhdl -lib work "../../trbnet/special/bus_register_handler.vhd"
 
 add_file -vhdl -lib work "../../trbnet/lattice/ecp3/lattice_ecp3_fifo_18x1k.vhd"
 add_file -vhdl -lib work "../../trbnet/lattice/ecp3/trb_net16_fifo_arch.vhd"