From: Jan Michel <j.michel@gsi.de>
Date: Fri, 28 Nov 2014 14:25:46 +0000 (+0100)
Subject: one more attribute to get timing right
X-Git-Url: https://jspc29.x-matter.uni-frankfurt.de/git/?a=commitdiff_plain;h=0833d0513bf05bf71ec9ce0c7f4bcacb9741fd8f;p=trb3.git

one more attribute to get timing right
---

diff --git a/ADC/source/adc_handler.vhd b/ADC/source/adc_handler.vhd
index 2e753ed..e3f323d 100644
--- a/ADC/source/adc_handler.vhd
+++ b/ADC/source/adc_handler.vhd
@@ -33,7 +33,8 @@ end entity;
 architecture adc_handler_arch of adc_handler is
 attribute syn_keep     : boolean;
 attribute syn_preserve : boolean;
-
+attribute syn_hier     : string;
+attribute syn_hier of adc_handler_arch : architecture is "hard";
 
 signal adc_data_out  : std_logic_vector(DEVICES*CHANNELS*RESOLUTION-1 downto 0);
 signal adc_fco_out   : std_logic_vector(DEVICES*RESOLUTION-1 downto 0);
diff --git a/ADC/source/adc_processor.vhd b/ADC/source/adc_processor.vhd
index 948952d..89dca95 100644
--- a/ADC/source/adc_processor.vhd
+++ b/ADC/source/adc_processor.vhd
@@ -39,7 +39,6 @@ attribute syn_hier     : string;
 attribute syn_ramstyle : string;
 attribute syn_keep     : boolean;
 attribute syn_preserve : boolean;
-
 attribute syn_hier of adc_processor_arch : architecture is "hard";
 
 type ram_t          is array (0 to 1023)       of unsigned(17 downto 0);