From: Adrian Weber Date: Tue, 1 Jun 2021 08:46:03 +0000 (+0200) Subject: switch threshold firmware between DiRICh versions by config and selection of pinout... X-Git-Url: https://jspc29.x-matter.uni-frankfurt.de/git/?a=commitdiff_plain;h=090c4b0305165d2361ab42981dbfaf25c5867e39;p=dirich.git switch threshold firmware between DiRICh versions by config and selection of pinout. Add register 0xFE with DiRICH Version info --- diff --git a/thresholds/config.vhd b/thresholds/config.vhd new file mode 100644 index 0000000..2bceacc --- /dev/null +++ b/thresholds/config.vhd @@ -0,0 +1,10 @@ +library ieee; +USE IEEE.std_logic_1164.ALL; +use ieee.numeric_std.all; + +package config is + + + constant DIRICH_VERSION : integer := 4; --DiRICH_vX. + -- in case of DIRICH_VERSION > 3, change pinout accordingly to dirich4 +end; diff --git a/thresholds/config_compile_giessen.pl b/thresholds/config_compile_giessen.pl new file mode 100644 index 0000000..12ba21c --- /dev/null +++ b/thresholds/config_compile_giessen.pl @@ -0,0 +1,27 @@ +Familyname => 'MachXO3LF', +Devicename => 'LCMXO3LF-4300E', +Package => 'WLCSP81', +Speedgrade => '5', + +TOPNAME => "thresholds", +lm_license_file_for_synplify => "7788\@fb07pc-u102325", +lm_license_file_for_par => "7788\@fb07pc-u102325", +lattice_path => '/usr/local/diamond/3.10_x64/', +synplify_path => '/usr/local/diamond/3.10_x64/synpbase', +synplify_command => "synpwrap -fg -options", +#synplify_command => "ssh adrian\@jspc37.x-matter.uni-frankfurt.de \"cd /local/adrian/git/dirich/combiner_cts/; LM_LICENSE_FILE=27020\@jspc29 /d/jspc29/lattice/synplify/O-2018.09-SP1/bin/synplify_premier -batch combiner.prj\"", + +nodelist_file => 'nodelist_frankfurt.txt', + + +#Include only necessary lpf files +pinout_file => 'thresholds_dirich4', #name of pin-out file, if not equal TOPNAME +#change DIRICH VERSION in config.vhd accordingly +include_TDC => 0, +include_GBE => 0, + +#Report settings +firefox_open => 0, +twr_number_of_errors => 20, +no_ltxt2ptxt => 1, #if there is no serdes being used +make_jed => 1, diff --git a/thresholds/thresholds.prj b/thresholds/thresholds.prj index 9831934..32ec807 100644 --- a/thresholds/thresholds.prj +++ b/thresholds/thresholds.prj @@ -6,6 +6,7 @@ add_file -vhdl -lib work "../../trbnet/trb_net_std.vhd" add_file -vhdl -lib work "workdir/version.vhd" +add_file -vhdl -lib work "./config.vhd" add_file -vhdl -lib work "../../vhdlbasics/interface/spi_slave.vhd" add_file -vhdl -lib work "../../vhdlbasics/machxo3/sedcheck.vhd" add_file -vhdl -lib work "../../vhdlbasics/io/pwm.vhd" diff --git a/thresholds/thresholds.vhd b/thresholds/thresholds.vhd index 8f88233..7d0d033 100644 --- a/thresholds/thresholds.vhd +++ b/thresholds/thresholds.vhd @@ -8,6 +8,7 @@ use machxo3lf.all; library work; use work.trb_net_std.all; use work.version.all; +use work.config.all; entity thresholds is port( @@ -121,36 +122,74 @@ THE_SPI : entity work.spi_slave DEBUG => open ); -THE_FLASH_CONTROLLER : entity generic_flash_ctrl - generic map ( - CFG_FLASH_DISABLE_COUNTER_WIDTH => 30, --31sec timeout - USE_I2C_PROG => c_YES -- DiRICH1,2,3: c_YES ; DiRICH4: c_NO - ) - port map( + +-- select Flash controller according to the Dirich version +THE_DIRICH_GEN : if DIRICH_VERSION < 4 generate + THE_FLASH_CONTROLLER : entity generic_flash_ctrl + generic map ( + CFG_FLASH_DISABLE_COUNTER_WIDTH => 30, --31sec timeout + USE_I2C_PROG => c_NO -- DiRICH1,2,3: c_NO ; DiRICH4: c_YES + ) + port map( + + CLK_f => clk_33, + CLK_l => clk_33, + RESET => '0', + + SPI_DATA_IN => spi_data_out, + SPI_DATA_OUT => spi_data_in, + SPI_ADDR_IN => spi_addr_out, + SPI_WRITE_IN => spi_write_out, + SPI_READ_IN => spi_read_out, + SPI_READY_OUT => spi_ready_in, + SPI_BUSY_IN => spi_busy_out, + + LOC_DATA_OUT => spi_rx_data, + LOC_DATA_IN => spi_tx_data, + LOC_ADDR_OUT => spi_addr, + LOC_WRITE_OUT => bus_write, + LOC_READ_OUT => bus_read, + LOC_READY_IN => bus_ready, + LOC_BUSY_OUT => bus_busy, + + SCL => SCL, + SDA => SDA + ); +end generate; + +THE_DIRICH_GEN : if DIRICH_VERSION >= 4 generate + THE_FLASH_CONTROLLER : entity generic_flash_ctrl + generic map ( + CFG_FLASH_DISABLE_COUNTER_WIDTH => 30, --31sec timeout + USE_I2C_PROG => c_YES -- DiRICH1,2,3: c_NO ; DiRICH4: c_YES + ) + port map( + + CLK_f => clk_33, + CLK_l => clk_33, + RESET => '0', + + SPI_DATA_IN => spi_data_out, + SPI_DATA_OUT => spi_data_in, + SPI_ADDR_IN => spi_addr_out, + SPI_WRITE_IN => spi_write_out, + SPI_READ_IN => spi_read_out, + SPI_READY_OUT => spi_ready_in, + SPI_BUSY_IN => spi_busy_out, + + LOC_DATA_OUT => spi_rx_data, + LOC_DATA_IN => spi_tx_data, + LOC_ADDR_OUT => spi_addr, + LOC_WRITE_OUT => bus_write, + LOC_READ_OUT => bus_read, + LOC_READY_IN => bus_ready, + LOC_BUSY_OUT => bus_busy, + + SCL => SCL, + SDA => SDA + ); +end generate; - CLK_f => clk_33, - CLK_l => clk_33, - RESET => '0', - - SPI_DATA_IN => spi_data_out, - SPI_DATA_OUT => spi_data_in, - SPI_ADDR_IN => spi_addr_out, - SPI_WRITE_IN => spi_write_out, - SPI_READ_IN => spi_read_out, - SPI_READY_OUT => spi_ready_in, - SPI_BUSY_IN => spi_busy_out, - - LOC_DATA_OUT => spi_rx_data, - LOC_DATA_IN => spi_tx_data, - LOC_ADDR_OUT => spi_addr, - LOC_WRITE_OUT => bus_write, - LOC_READ_OUT => bus_read, - LOC_READY_IN => bus_ready, - LOC_BUSY_OUT => bus_busy, - - SCL => SCL, - SDA => SDA - ); PROC_REGS : process begin wait until rising_edge(clk_33); @@ -167,6 +206,7 @@ PROC_REGS : process begin when x"31" => spi_tx_data <= std_logic_vector(to_unsigned(VERSION_NUMBER_TIME/2**16,16)); when x"ee" => spi_tx_data <= sed_debug(15 downto 0); when x"ef" => spi_tx_data <= sed_debug(31 downto 16); + when x"fe" => spi_tx_data <= std_logic_vector(to_unsigned(DIRICH_VERSION,16)); --DiRICH version (different pinout due to I2C) when x"ff" => spi_tx_data <= x"0100"; --version number when others => spi_tx_data <= x"0000"; end case;