From: hadaq Date: Wed, 23 Jun 2010 23:44:14 +0000 (+0000) Subject: bug fix master_lock X-Git-Tag: v6.0~254 X-Git-Url: https://jspc29.x-matter.uni-frankfurt.de/git/?a=commitdiff_plain;h=0c673f015d9226fbbc9b10a8d8e9ead348c8cc48;p=trbnettools.git bug fix master_lock --- diff --git a/libtrbnet/trbnet.c b/libtrbnet/trbnet.c index 5bd3ee2..b51ebf5 100644 --- a/libtrbnet/trbnet.c +++ b/libtrbnet/trbnet.c @@ -1,4 +1,4 @@ -const char trbnet_version[] = "$Revision: 2.65 $"; +const char trbnet_version[] = "$Revision: 2.66 $"; #include #include @@ -931,9 +931,9 @@ static int trb_fifo_read(uint8_t channel, } -static int ports_locked = 0; +static int master_lock = 0; -static int lockPorts() +static int lockPorts(int masterLock) { struct sembuf sops = { 0, /* sem_num: We only use one track */ @@ -941,7 +941,7 @@ static int lockPorts() SEM_UNDO /* sem_flg: remove lock if process gets killed */ }; - if (ports_locked == 1) return 0; + if ((master_lock == 1) && (masterLock == 0)) return 0; /* Wait for semaphore and lock it */ if (semop(semid, &sops, 1) == -1) { @@ -954,12 +954,13 @@ static int lockPorts() /* Get FifoToggleBit-Status, needed by read32_from_FPGA ... */ fifoToggleBit = readPC() & FIFO_TOGGLE_BIT; + + if (masterLock != 0) master_lock = 1; - ports_locked = 1; return 0; } -static int unlockPorts() +static int unlockPorts(int masterLock) { struct sembuf sops = { 0, /* sem_num: We only use one track */ @@ -967,7 +968,7 @@ static int unlockPorts() SEM_UNDO /* */ }; - if (ports_locked == 0) return 0; + if ((master_lock == 1) && (masterLock == 0)) return 0; /* Release semaphore */ if (semop(semid, &sops, 1) == -1) { @@ -977,8 +978,9 @@ static int unlockPorts() /* Unblock Signals */ sigprocmask(SIG_SETMASK, &blockSetOld, NULL); - - ports_locked = 0; + + if (masterLock != 0) master_lock = 0; + return 0; } @@ -1065,7 +1067,7 @@ int init_ports() close(memfd); - if (lockPorts() == -1) return -1; + if (lockPorts(0) == -1) return -1; /* Set output enabled if not done yet */ if ((*GPIOB_OE_OFFSET != GPIOB_OE_PINS) || @@ -1081,7 +1083,7 @@ int init_ports() setbitsPC(0x30000); clrbitsPC(0x30000); - if (unlockPorts() == -1) return -1; + if (unlockPorts(0) == -1) return -1; return 0; } @@ -1107,11 +1109,11 @@ int trb_fifo_flush(uint8_t channel) fprintf(stderr, "Flushing FIFO of channel# %d\n", channel); } - if (lockPorts() == -1) return -1; + if (lockPorts(0) == -1) return -1; fifo_flush(channel); - if (unlockPorts() == -1) return -1; + if (unlockPorts(0) == -1) return -1; return 0; } @@ -1125,11 +1127,11 @@ int trb_register_read(uint16_t trb_address, trb_errno = TRB_NONE; - if (lockPorts() == -1) return -1; + if (lockPorts(0) == -1) return -1; /* Init transfer */ if (trb_init_transfer(3) == -1) { - unlockPorts(); + unlockPorts(0); return -1; } @@ -1154,7 +1156,7 @@ int trb_register_read(uint16_t trb_address, status = trb_fifo_read(3, FIFO_MODE_REG_READ, data, dsize); - if (unlockPorts() == -1) return -1; + if (unlockPorts(0) == -1) return -1; if ((status > 0) && (status % 2 != 0)) { trb_errno = TRB_INVALID_PKG_NUMBER; @@ -1186,11 +1188,11 @@ int trb_register_read_mem(uint16_t trb_address, } length = length | (option == 0 ? 0x8000 : 0x0000); - if (lockPorts() == -1) return -1; + if (lockPorts(0) == -1) return -1; /* Init transfer */ if (trb_init_transfer(3) == -1) { - unlockPorts(); + unlockPorts(0); return -1; } @@ -1215,7 +1217,7 @@ int trb_register_read_mem(uint16_t trb_address, status = trb_fifo_read(3, FIFO_MODE_REG_READ_MEM, data, dsize); - if (unlockPorts() == -1) return -1; + if (unlockPorts(0) == -1) return -1; if (status == -1) return status; @@ -1243,11 +1245,11 @@ int trb_register_write(uint16_t trb_address, trb_errno = TRB_NONE; - if (lockPorts() == -1) return -1; + if (lockPorts(0) == -1) return -1; /* Init transfer */ if (trb_init_transfer(3) == -1) { - unlockPorts(); + unlockPorts(0); return -1; } @@ -1272,7 +1274,7 @@ int trb_register_write(uint16_t trb_address, status = trb_fifo_read(3, FIFO_MODE_REG_WRITE, NULL, 0); - if (unlockPorts() == -1) return -1; + if (unlockPorts(0) == -1) return -1; return status; } @@ -1299,13 +1301,13 @@ int trb_register_write_mem(uint16_t trb_address, } config = config | (option == 0 ? 0x8000 : 0x0000); - if (lockPorts() == -1) return -1; + if (lockPorts(0) == -1) return -1; while (ctr < size) { uint16_t len = (size - ctr) >= blockSize ? blockSize : (size - ctr); /* Init transfer */ if (trb_init_transfer(3) == -1) { - unlockPorts(); + unlockPorts(0); return -1; } @@ -1341,7 +1343,7 @@ int trb_register_write_mem(uint16_t trb_address, status = trb_fifo_read(3, FIFO_MODE_REG_WRITE, NULL, 0); } - if (unlockPorts() == -1) return -1; + if (unlockPorts(0) == -1) return -1; return status; } @@ -1354,11 +1356,11 @@ int trb_read_uid(uint16_t trb_address, trb_errno = TRB_NONE; - if (lockPorts() == -1) return -1; + if (lockPorts(0) == -1) return -1; /* Init transfer */ if (trb_init_transfer(3) == -1) { - unlockPorts(); + unlockPorts(0); return -1; } @@ -1383,7 +1385,7 @@ int trb_read_uid(uint16_t trb_address, status = trb_fifo_read(3, FIFO_MODE_UID, (uint32_t*)data, dsize); - if (unlockPorts() == -1) return -1; + if (unlockPorts(0) == -1) return -1; if ((status > 0) && (status % 4 != 0)) { trb_errno = TRB_INVALID_PKG_NUMBER; @@ -1408,11 +1410,11 @@ int trb_set_address(uint64_t uid, return -1; } - if (lockPorts() == -1) return -1; + if (lockPorts(0) == -1) return -1; /* Init transfer */ if (trb_init_transfer(3) == -1) { - unlockPorts(); + unlockPorts(0); return -1; } @@ -1441,7 +1443,7 @@ int trb_set_address(uint64_t uid, status = trb_fifo_read(3, FIFO_MODE_SET_ADDRESS, NULL, 0); - if (unlockPorts() == -1) return -1; + if (unlockPorts(0) == -1) return -1; if (status == -1) return -1; if (status != 2) { @@ -1465,11 +1467,11 @@ int trb_ipu_data_read(uint8_t type, if (data == NULL) return -1; - if (lockPorts() == -1) return -1; + if (lockPorts(0) == -1) return -1; /* Init transfer IPU Channel */ if (trb_init_transfer(1) == -1) { - unlockPorts(); + unlockPorts(0); return -1; } @@ -1493,7 +1495,7 @@ int trb_ipu_data_read(uint8_t type, status = trb_fifo_read(1, FIFO_MODE_IPU_DATA, data, dsize); - if (unlockPorts() == -1) return -1; + if (unlockPorts(0) == -1) return -1; return status; } @@ -1508,11 +1510,11 @@ int trb_send_trigger(uint8_t type, trb_errno = TRB_NONE; - if (lockPorts() == -1) return -1; + if (lockPorts(0) == -1) return -1; /* Init transfer trigger */ if (trb_init_transfer(0) == -1) { - unlockPorts(); + unlockPorts(0); return -1; } @@ -1542,7 +1544,7 @@ int trb_send_trigger(uint8_t type, /* Check for replay packets (trigger) */ status = trb_fifo_read(0, FIFO_MODE_TERM_ONLY, NULL, 0); - if (unlockPorts() == -1) return -1; + if (unlockPorts(0) == -1) return -1; if (status == -1) return -1; @@ -1563,17 +1565,17 @@ int trb_send_trigger_rich(uint8_t trg_input, return -1; } - if (lockPorts() == -1) return -1; + if (lockPorts(0) == -1) return -1; /* Init transfer slowcontrol */ if (trb_init_transfer(3) == -1) { - unlockPorts(); + unlockPorts(0); return -1; } /* Init transfer trigger */ if (trb_init_transfer(0) == -1) { - unlockPorts(); + unlockPorts(0); return -1; } @@ -1612,14 +1614,14 @@ int trb_send_trigger_rich(uint8_t trg_input, status = trb_fifo_read(3, FIFO_MODE_TERM_ONLY, NULL, 0); if (status == -1) { fifo_flush(0); - unlockPorts(); + unlockPorts(0); return -1; } /* Check for replay packets (trigger) */ status = trb_fifo_read(0, FIFO_MODE_TERM_ONLY, NULL, 0); - if (unlockPorts() == -1) return -1; + if (unlockPorts(0) == -1) return -1; if (status == -1) return -1; @@ -1630,7 +1632,7 @@ int fpga_register_read(uint16_t reg_address, uint32_t* value) { trb_errno = TRB_NONE; - if (lockPorts() == -1) return -1; + if (lockPorts(0) == -1) return -1; /* DEBUG INFO */ if (trb_debug > 0) { @@ -1639,7 +1641,7 @@ int fpga_register_read(uint16_t reg_address, uint32_t* value) read32_from_FPGA(reg_address, value); - if (unlockPorts() == -1) return -1; + if (unlockPorts(0) == -1) return -1; return 0; } @@ -1648,7 +1650,7 @@ int fpga_register_write(uint16_t reg_address, uint32_t value) { trb_errno = TRB_NONE; - if (lockPorts() == -1) return -1; + if (lockPorts(0) == -1) return -1; /* DEBUG INFO */ if (trb_debug > 0) { @@ -1657,7 +1659,7 @@ int fpga_register_write(uint16_t reg_address, uint32_t value) write32_to_FPGA(reg_address, value); - if (unlockPorts() == -1) return -1; + if (unlockPorts(0) == -1) return -1; return 0; } @@ -1666,7 +1668,7 @@ int network_reset() { trb_errno = TRB_NONE; - if (lockPorts() == -1) return -1; + if (lockPorts(0) == -1) return -1; /* DEBUG INFO */ if (trb_debug > 0) { @@ -1678,7 +1680,7 @@ int network_reset() write32_to_FPGA(0x10, 0x8000); sleep(6); - if (unlockPorts() == -1) return -1; + if (unlockPorts(0) == -1) return -1; return 0; } @@ -1687,7 +1689,7 @@ int com_reset() { trb_errno = TRB_NONE; - if (lockPorts() == -1) return -1; + if (lockPorts(0) == -1) return -1; /* DEBUG INFO */ if (trb_debug > 0) { @@ -1697,7 +1699,7 @@ int com_reset() setbitsPC(0x30000); clrbitsPC(0x30000); - if (unlockPorts() == -1) return -1; + if (unlockPorts(0) == -1) return -1; return 0; } @@ -1716,7 +1718,7 @@ int trb_register_modify(uint16_t trb_address, uint32_t *data = NULL; int i; - if (lockPorts() == -1) return -1; + if (lockPorts(1) == -1) return -1; data = (uint32_t *) malloc(sizeof(uint32_t) * NUM_ENDPOINTS * 2); if (data == NULL) abort(); @@ -1725,7 +1727,7 @@ int trb_register_modify(uint16_t trb_address, data, NUM_ENDPOINTS * 2); if (status == -1) { free(data); - unlockPorts(); + unlockPorts(1); return -1; } @@ -1761,20 +1763,20 @@ int trb_register_modify(uint16_t trb_address, default: free(data); - unlockPorts(); + unlockPorts(1); return -1; } if ((trb_register_write(trb_address, reg_address, value) == -1) && (trb_errno != TRB_ENDPOINT_NOT_REACHED)) { free(data); - unlockPorts(); + unlockPorts(1); return -1; } } free(data); - if (unlockPorts() == -1) return -1; + if (unlockPorts(1) == -1) return -1; return 0; }