From: Andreas Neiser Date: Tue, 17 Feb 2015 16:32:58 +0000 (+0100) Subject: Fix X-Git-Url: https://jspc29.x-matter.uni-frankfurt.de/git/?a=commitdiff_plain;h=0c7b66d48cb7b211a7b3ad70155abcd7364987c1;p=trb3.git Fix --- diff --git a/ADC/sim/adc_serializer.vhd b/ADC/sim/adc_serializer.vhd index c2a1825..ee6d98a 100644 --- a/ADC/sim/adc_serializer.vhd +++ b/ADC/sim/adc_serializer.vhd @@ -26,7 +26,7 @@ begin ADC_DCO <= ddr_clock; output : process is - variable cnt : unsigned(4 downto 0); + variable cnt : unsigned(4 downto 0) := (others => '0'); begin wait until rising_edge(ddr_clock); ADC_DATA <= std_logic_vector(cnt);