From: c.wendisch Date: Fri, 29 Sep 2023 15:29:10 +0000 (+0200) Subject: adde new short MBO, cleared merge conflicts X-Git-Url: https://jspc29.x-matter.uni-frankfurt.de/git/?a=commitdiff_plain;h=0e13c049c94701a0cf713cd7f398f7d984c7d28b;p=hades_mdc_settings.git adde new short MBO, cleared merge conflicts --- diff --git a/installation/mbo_positions.db b/installation/mbo_positions.db index 4a302ad..fbe53f1 100644 --- a/installation/mbo_positions.db +++ b/installation/mbo_positions.db @@ -1,10 +1,10 @@ #Plane Sector MBO Long Serial ########################################## 0 0 0 0 007 -0 0 1 1 106 -0 0 2 1 107 -0 0 3 0 104 -0 0 4 0 105 +0 0 1 1 104 +0 0 2 1 105 +0 0 3 0 011 +0 0 4 0 000 0 0 5 0 006 0 0 6 1 103 0 0 7 1 091 @@ -15,29 +15,29 @@ 0 0 12 1 096 0 0 13 0 002 -0 1 0 0 0 -0 1 1 1 095 -0 1 2 1 093 -0 1 3 0 0 -0 1 4 0 0 -0 1 5 0 0 +0 1 0 0 108 +0 1 1 1 106 +0 1 2 1 107 +0 1 3 0 109 +0 1 4 0 110 +0 1 5 0 111 0 1 6 1 092 #Frankfurt 0 1 7 1 090 #Frankfurt -0 1 8 0 0 -0 1 9 0 0 -0 1 10 1 0 -0 1 11 0 0 -0 1 12 1 0 -0 1 13 0 0 +0 1 8 0 015 +0 1 9 0 004 +0 1 10 1 103 +0 1 11 0 010 +0 1 12 1 094 +0 1 13 0 013 0 2 0 0 005 -0 2 1 1 0 -0 2 2 1 0 +0 2 1 1 093 +0 2 2 1 095 0 2 3 0 0 0 2 4 0 0 0 2 5 0 0 -0 2 6 1 0 -0 2 7 1 0 +0 2 6 1 101 +0 2 7 1 100 0 2 8 0 0 0 2 9 0 0 0 2 10 1 0 diff --git a/installation/power_outputs.db b/installation/power_outputs.db index cbe1246..35fedc4 100644 --- a/installation/power_outputs.db +++ b/installation/power_outputs.db @@ -1,19 +1,19 @@ #Plane Sector MBO Power Output ########################################## -# 0 0 0 0 0 -# 0 0 1 0 1 -# 0 0 2 0 2 -# 0 0 3 0 3 -# 0 0 4 1 0 -# 0 0 5 1 1 -# 0 0 6 1 2 -# 0 0 7 1 3 -# 0 0 8 2 0 -# 0 0 9 2 1 -# 0 0 10 2 2 -# 0 0 11 2 3 -# 0 0 12 3 0 -# 0 0 13 3 2 + 0 0 0 0 0 + 0 0 1 0 1 + 0 0 2 0 2 + 0 0 3 0 3 + 0 0 4 1 0 + 0 0 5 1 1 + 0 0 6 1 2 + 0 0 7 1 3 + 0 0 8 2 0 + 0 0 9 2 1 + 0 0 10 2 2 + 0 0 11 2 3 + 0 0 12 3 0 + 0 0 13 3 2 0 1 0 1 3 0 1 1 0 3 diff --git a/pasttrec/pasttrec_baseline.db b/pasttrec/pasttrec_baseline.db index 1a2a310..43a2506 100644 --- a/pasttrec/pasttrec_baseline.db +++ b/pasttrec/pasttrec_baseline.db @@ -324,7 +324,7 @@ 0531 2 16 18 18 18 17 25 17 17 0531 3 20 22 21 21 21 19 22 21 -<<<<<<< HEAD + 1041 0 25 16 24 18 19 21 21 28 1041 1 18 17 25 19 27 15 23 20 1041 2 17 18 15 18 14 19 26 23 @@ -365,7 +365,6 @@ 1072 1 20 18 18 23 23 18 26 13 1072 2 22 15 29 25 23 20 14 30 1072 3 20 17 23 17 22 15 22 16 -======= 1020 0 22 21 21 20 16 23 24 25 1020 1 24 23 17 19 18 22 19 24 @@ -380,5 +379,13 @@ 1022 2 26 19 26 17 25 17 26 13 1022 3 20 23 19 23 23 16 14 13 + 1080 0 77 13 16 24 77 77 77 77 + 1080 1 77 23 20 77 77 22 19 18 + 1080 2 77 77 19 23 17 16 77 77 + 1080 3 77 16 77 77 19 77 19 22 + + 1081 0 22 22 77 77 77 77 28 77 + 1081 1 77 24 23 77 77 77 20 17 + 1081 2 77 77 23 77 15 20 20 77 + 1081 3 77 19 24 23 77 20 77 26 ->>>>>>> be06249b7960cfe98af298729baa0b8cd3f5491b diff --git a/scripts/powerboard_set_all.sh b/scripts/powerboard_set_all.sh index 0a6eda9..f759f4a 100755 --- a/scripts/powerboard_set_all.sh +++ b/scripts/powerboard_set_all.sh @@ -1,24 +1,25 @@ VSTEP=$1 ./powerboard_status.pl -b 0x8e00 +echo "waiting for power board response" sleep 5 for ADDR in 8e00 8e01 8e02 8e03 8e04 8e05 8e06 8e07 8e08 8e09 8e0a 8e0b 8e0c 8e0d do echo "switch off MBO " $ADDR - ./mdc_voltage.pl --off -b 0x$ADDR + #./mdc_voltage.pl --off -b 0x$ADDR done -for dummy in 5 +for dummy in 6 do - #for ADDR in 8e00 8e01 8e02 8e03 8e04 8e05 8e06 8e07 8e08 8e09 8e0a 8e0b 8e0c 8e0d + for ADDR in 8e00 8e01 8e02 8e03 8e04 8e05 8e06 8e07 8e08 8e09 8e0a 8e0b 8e0c 8e0d # for ADDR in 8e00 8e01 8e0a 8e0b 8e0c 8e0d ## bad set of MBO, crasching trb after second power up - for ADDR in 8e02 8e04 + #for ADDR in 8e02 8e04 # 8e03 8e04 8e05 8e06 8e08 8e09 # for ADDR in 8e60 8e61 8e62 8e63 8e64 8e65 8e66 8e67 8e68 8e69 8e6a 8e6b 8e6c 8e6d 8e6e 8e6f # for ADDR in 8e01 8e02 do echo "switch on MBO " $ADDR - #./mdc_voltage.pl -w -b 0x$ADDR -c 0 -v $VSTEP -w - #./mdc_voltage.pl -w -b 0x$ADDR -c 1 -v $VSTEP -w + #./mdc_voltage.pl -b 0x$ADDR -c 0 -v $VSTEP -w + #./mdc_voltage.pl -b 0x$ADDR -c 1 -v $VSTEP -w ./mdc_voltage.pl --on -b 0x$ADDR sleep 2 ./mdc_voltage.pl --off --on -b 0x$ADDR @@ -29,6 +30,7 @@ for dummy in 5 done ./powerboard_status.pl -b 0x8e00 sleep 3 -./startup.sh +#./startup.sh + diff --git a/scripts/trbflash.log b/scripts/trbflash.log index 48ab7ca..0b446fb 100644 --- a/scripts/trbflash.log +++ b/scripts/trbflash.log @@ -1,4 +1,4 @@ ------------- Wed Aug 2 15:18:46 2023 ---------------------------------- +------------ Thu Sep 28 15:30:53 2023 ---------------------------------- diff --git a/serials/serials_mdcmbo.db b/serials/serials_mdcmbo.db index cecaaaf..13d1294 100644 --- a/serials/serials_mdcmbo.db +++ b/serials/serials_mdcmbo.db @@ -67,16 +67,20 @@ 70163 0x0000e820001f2941 #long prototype MBO, with 85k FPGA +#working fine @JAN 0905 0x000066e000822941 0900 0x0000b8a400822941 0901 0x0000c9bc00822941 0902 0x00003cb800822941 +#working fine 0915 0x0000620e00822941 0910 0x0000194a00822941 0911 0x00002a0200822941 0912 0x000080c900822941 +#working fine @JAN +# maybe second TDC shaky? 0925 0x000093ed00822941 0920 0x00003e1100822941 0921 0x0000437500822941 @@ -97,32 +101,21 @@ 0951 0x000025db00822941 0952 0x0000947d00822941 +#96 +# 3rd TDC off 0965 0x0000be6300822941 0960 0x000058c500822941 0961 0x00002b9100822941 0962 0x0000b1a500822941 -##0970 no real PASTTREC reaction , no hits +#97 ##0971## FPGA neu gelötet, no longer faulty FPG crashed TRB3 +# working fine 0975 0x000060c200822941 0970 0x0000b8a600822941 0971 0x0000443f00822941 0972 0x0000b8e600822941 -<<<<<<< HEAD -======= - -1025 0x0000379700822941 -1020 0x0000622600822941 -1021 0x0000be4300822941 -1022 0x000018f300822941 - -#0975 -#0970 -#0971 -#0972 - ->>>>>>> be06249b7960cfe98af298729baa0b8cd3f5491b 1005 0x00003cdc00822941 1000 0x000080b900822941 1001 0x0000464900822941 @@ -133,12 +126,13 @@ 1011 0x0000b89800822941 1012 0x00003c7200822941 -#MBO #102: 3rd TDC not showing up in trbnet, but programming works +#MBO #102: 3rd TDC not showing up in trbnet, but programming works (@ Jan after r27 exchange stable) 1025 0x0000379700822941 1020 0x0000622600822941 1021 0x0000be4300822941 -1022 +1022 0x000018f300822941 +# working fine 1035 0x0000274500822941 1030 0x0000263400822941 1031 0x000062c000822941 @@ -146,13 +140,15 @@ #1452 -## completely offline or missing of several TDCs, all TDCs missing is possible +## working fine after R27 exchange? +##sometimes completely offline or missing of several TDCs, all TDCs missing is possible 1045 0x00003dc900822941 1040 0x0000d9ad00822941 1041 0x0000257200822941 1042 0x00003d6400822941 #1453 +## working fine after R27 exchange ! # last TDC missing often 1055 0x0000192b00822941 1050 0x0000b8a900822941 @@ -160,6 +156,7 @@ 1052 0x0000762400822941 #1454 +# !! offline but blinking correct # first or second TDC missing often 1065 0x0000265b00822941 1060 0x00003dbd00822941 @@ -167,8 +164,35 @@ 1062 0x0000c85800822941 #1455 +# working fine 1075 0x000049d900822941 1070 0x00001dfc00822941 1071 0x0000d3c100822941 1072 0x0000b1c000822941 +#1700 +1085 0x000076f200822941 +1080 0x0000c9fe00822941 +# second tdc programmed via cable successfully, but not showing up in tbnet + +#1701 ## working fine +1095 0x0000dad300822941 +1090 0x000075c300822941 +1091 0x00009de100822941 + +#1702 +# all fpga programmed via cable successfully, but not showing up in tbnet +# after touching PCB around OEP FPGA, connecting , running stable +# offline again after trb reset +1105 0x00009de900822941 +1100 0x0000ceb900822941 +1101 0x0000cf6c00822941 + +#1703 ## working fine +1115 0x0000b21700822941 +1110 0x0000aca300822941 +1111 0x00009eb900822941 + + + + diff --git a/settings_power/settings_voltage.db b/settings_power/settings_voltage.db index 7ca6485..8538ecf 100644 --- a/settings_power/settings_voltage.db +++ b/settings_power/settings_voltage.db @@ -7,12 +7,12 @@ # Address # Voltage 1 # Voltage 2 ######################################## <<<<<<< HEAD - 0x8e00 4 5 - 0x8e01 7 7 - 0x8e02 3 4 - 0x8e03 2 4 + 0x8e00 5 5 + 0x8e01 5 7 + 0x8e02 7 7 + 0x8e03 5 5 0x8e04 5 7 - 0x8e05 5 5 + 0x8e05 7 6 0x8e06 6 7 0x8e07 7 7 0x8e08 5 6 @@ -23,18 +23,18 @@ 0x8e0d 3 3 ======= 0x8e00 5 5 - 0x8e01 6 7 - 0x8e02 5 6 + 0x8e01 5 7 + 0x8e02 7 7 0x8e03 5 5 0x8e04 5 5 - 0x8e05 4 4 + 0x8e05 7 6 0x8e06 5 7 - 0x8e07 6 6 + 0x8e07 7 7 0x8e08 5 5 0x8e09 5 5 0x8e0a 5 5 0x8e0b 4 4 - 0x8e0c 5 5 + 0x8e0c 7 7 0x8e0d 5 5 >>>>>>> be06249b7960cfe98af298729baa0b8cd3f5491b