From: Jan Michel <j.michel@gsi.de>
Date: Fri, 20 Nov 2015 10:56:24 +0000 (+0100)
Subject: fixing slow control register feedback signals
X-Git-Url: https://jspc29.x-matter.uni-frankfurt.de/git/?a=commitdiff_plain;h=112305a0222bdede7cbff7eb74ed6b7c1344b215;p=trbnet.git

fixing slow control register feedback signals
---

diff --git a/gbe_trb/base/gbe_wrapper.vhd b/gbe_trb/base/gbe_wrapper.vhd
index 2e6623e..e2ab1d9 100644
--- a/gbe_trb/base/gbe_wrapper.vhd
+++ b/gbe_trb/base/gbe_wrapper.vhd
@@ -186,6 +186,8 @@ architecture RTL of gbe_wrapper is
 	signal monitor_rx_frames, monitor_rx_bytes, monitor_tx_frames, monitor_tx_bytes, monitor_tx_packets, monitor_dropped : std_logic_vector(4 * 32 - 1 downto 0);
 	signal sum_rx_frames, sum_rx_bytes, sum_tx_frames, sum_tx_bytes, sum_tx_packets, sum_dropped                         : std_logic_vector(31 downto 0);
 
+	signal busip0, busip1, busip2, busip3 : CTRLBUS_TX;
+	
 	signal dummy_event : std_logic_vector(15 downto 0);
 	signal dummy_mode  : std_logic;
 	signal make_reset0, make_reset1, make_reset2, make_reset3 : std_logic := '0';
@@ -339,10 +341,10 @@ begin
 				SLV_ADDR_IN              => BUS_IP_RX.addr(7 downto 0),
 				SLV_READ_IN              => BUS_IP_RX.read,
 				SLV_WRITE_IN             => BUS_IP_RX.write,
-				SLV_BUSY_OUT             => BUS_IP_TX.nack,
-				SLV_ACK_OUT              => BUS_IP_TX.ack,
+				SLV_BUSY_OUT             => busip3.nack,
+				SLV_ACK_OUT              => busip3.ack,
 				SLV_DATA_IN              => BUS_IP_RX.data,
-				SLV_DATA_OUT             => BUS_IP_TX.data,
+				SLV_DATA_OUT             => busip3.data,
 				CFG_GBE_ENABLE_IN        => cfg_gbe_enable,
 				CFG_IPU_ENABLE_IN        => cfg_ipu_enable,
 				CFG_MULT_ENABLE_IN       => cfg_mult_enable,
@@ -465,7 +467,10 @@ begin
         SLV_ADDR_IN              => BUS_IP_RX.addr(7 downto 0),
         SLV_READ_IN              => BUS_IP_RX.read,
         SLV_WRITE_IN             => BUS_IP_RX.write,
-        SLV_DATA_IN              => BUS_IP_RX.data,				
+        SLV_BUSY_OUT             => busip2.nack,
+        SLV_ACK_OUT              => busip2.ack,
+        SLV_DATA_IN              => BUS_IP_RX.data,
+        SLV_DATA_OUT             => busip2.data,        
 				CFG_GBE_ENABLE_IN        => cfg_gbe_enable,
 				CFG_IPU_ENABLE_IN        => cfg_ipu_enable,
 				CFG_MULT_ENABLE_IN       => cfg_mult_enable,
@@ -588,7 +593,10 @@ begin
         SLV_ADDR_IN              => BUS_IP_RX.addr(7 downto 0),
         SLV_READ_IN              => BUS_IP_RX.read,
         SLV_WRITE_IN             => BUS_IP_RX.write,
-        SLV_DATA_IN              => BUS_IP_RX.data,       
+        SLV_BUSY_OUT             => busip1.nack,
+        SLV_ACK_OUT              => busip1.ack,
+        SLV_DATA_IN              => BUS_IP_RX.data,
+        SLV_DATA_OUT             => busip1.data,        
 				CFG_GBE_ENABLE_IN        => cfg_gbe_enable,
 				CFG_IPU_ENABLE_IN        => cfg_ipu_enable,
 				CFG_MULT_ENABLE_IN       => cfg_mult_enable,
@@ -711,7 +719,10 @@ begin
         SLV_ADDR_IN              => BUS_IP_RX.addr(7 downto 0),
         SLV_READ_IN              => BUS_IP_RX.read,
         SLV_WRITE_IN             => BUS_IP_RX.write,
-        SLV_DATA_IN              => BUS_IP_RX.data,       
+        SLV_BUSY_OUT             => busip0.nack,
+        SLV_ACK_OUT              => busip0.ack,
+        SLV_DATA_IN              => BUS_IP_RX.data,
+        SLV_DATA_OUT             => busip0.data,         
 				CFG_GBE_ENABLE_IN        => cfg_gbe_enable,
 				CFG_IPU_ENABLE_IN        => cfg_ipu_enable,
 				CFG_MULT_ENABLE_IN       => cfg_mult_enable,
@@ -745,6 +756,11 @@ begin
 		make_reset0 <= '0';	
 	end generate NO_LINK0_GEN;	
 
+	BUS_IP_TX.ack  <= busip0.ack or busip1.ack or busip2.ack or busip3.ack when rising_edge(CLK_SYS_IN);
+  BUS_IP_TX.nack <= busip0.nack or busip1.nack or busip2.nack or busip3.nack when rising_edge(CLK_SYS_IN);
+	BUS_IP_TX.data <= busip0.data or busip1.data or busip2.data or busip3.data when rising_edge(CLK_SYS_IN);
+	
+	
 	real_ipu_gen : if USE_EXTERNAL_TRBNET_DUMMY = 0 generate
 		ipu_mult : entity work.gbe_ipu_multiplexer
 			generic map(