From: Jan Michel <michel@physik.uni-frankfurt.de>
Date: Mon, 21 Oct 2024 08:21:22 +0000 (+0200)
Subject: fix reboot on reset sequence for ECP5
X-Git-Url: https://jspc29.x-matter.uni-frankfurt.de/git/?a=commitdiff_plain;h=165208aea1fd1ceefa5000e6d9560f4871298c77;p=trbnet.git

fix reboot on reset sequence for ECP5
---

diff --git a/special/fpga_reboot.vhd b/special/fpga_reboot.vhd
index 851d9d5..9f745a3 100644
--- a/special/fpga_reboot.vhd
+++ b/special/fpga_reboot.vhd
@@ -18,22 +18,27 @@ architecture fpga_reboot_arch of fpga_reboot is
 
 
   signal delayed_restart_fpga : std_logic := '0';
-  signal restart_fpga_counter : unsigned(11 downto 0);  
+  signal restart_fpga_counter : unsigned(11 downto 0) := x"000";  
   signal last_reset : std_logic := '0';
+  signal last_delayed_restart_fpga : std_logic;
 begin
 
 PROC_REBOOT : process
   begin
     wait until rising_edge(CLK);
     last_reset <= RESET;
-    
-    if RESET = '0' and last_reset = '1' then
-      delayed_restart_fpga   <= REBOOT_ON_RESET;
-      restart_fpga_counter   <= x"000";
-    else
+    -- last_delayed_restart_fpga <= delayed_restart_fpga;
+    -- if RESET = '0' and last_reset = '1' then
+    --   delayed_restart_fpga   <= REBOOT_ON_RESET;
+    --   if REBOOT_ON_RESET = '1' then
+    --     restart_fpga_counter   <= x"F00";
+    --   else
+    --     restart_fpga_counter   <= x"000";      
+    --   end if;
+    -- else
       delayed_restart_fpga     <= '0';
       PREPARE_FOR_RELOAD       <= '0';
-      if DO_REBOOT = '1' then
+      if DO_REBOOT = '1'  or (RESET = '0' and last_reset = '1' and REBOOT_ON_RESET = '1') then
         restart_fpga_counter   <= x"001";
       elsif restart_fpga_counter /= x"000" then
         restart_fpga_counter   <= restart_fpga_counter + 1;
@@ -44,9 +49,9 @@ PROC_REBOOT : process
           delayed_restart_fpga <= '1';
         end if;
       end if;
-    end if;
+    -- end if;
   end process;    
 
-PROGRAMN                 <= not delayed_restart_fpga;    
+PROGRAMN                 <= not (delayed_restart_fpga);-- or last_delayed_restart_fpga);
     
 end architecture;