From: hadeshyp <hadeshyp>
Date: Wed, 13 Jun 2012 17:53:16 +0000 (+0000)
Subject: *** empty log message ***
X-Git-Url: https://jspc29.x-matter.uni-frankfurt.de/git/?a=commitdiff_plain;h=18a3b54e1215e84f980ae3a4c9c67e4168029dc8;p=daqdocu.git

*** empty log message ***
---

diff --git a/trb3/DacProgramming.tex b/trb3/DacProgramming.tex
index a603b8b..69ed6c6 100644
--- a/trb3/DacProgramming.tex
+++ b/trb3/DacProgramming.tex
@@ -3,15 +3,37 @@ Programming the DAC for threshold generation is simple: A standard SPI interface
 
 The slow-control interface:
 \begin{itemize}
- \item 32 Bit Data Memory: 0xd800 - 0xd80f, Length register 0xd810 
- \item Transfer is started when length register (counting 32 Bit words) is written. 
- \item While busy, the writing to the length register will be ignored and gives back a no-more-data  flag.
- \item Doing a memory write with 17 words will do the job, should be faster  than two individual accesses
- \item All data is sent MSB first (Bit 31), Bits 7-0 are the don't-care-Bits of  the DAC. 
- \item Interface speed: e.g. 12.5 MHz -> max. 40us for 16 chips
+ \item 32 Bit Data Memory: 0xd400 - 0xd40f, Length register 0xd410 
+ \item Transfer is started when the length register (counting 32 Bit words) is written. 
+ \item While busy, the writing to the length register will be ignored and gives back a no-more-data flag.
+ \item Doing a memory write with 17 words will do the job, should be faster than two individual accesses for data and length.
+ \item All data is sent MSB first (Bit 31), Bits 31-24 are the don't-care-Bits of the DAC. 
+ \item Interface speed: e.g. 6.25 MHz -> max. 80us for 16 chips
 \end{itemize}
 
-The software takes a text file as input (format to be defined) and generates the correct SPI sequence to load and activate the DAC.
+The software takes a text file as input and generates the correct SPI sequence to load and activate the DAC.
+The ASCII format is shown below, the commands can be found in table~\ref{ltc2600cmd}.
+\begin{verbatim}
+# DAC     Channel       Command       Value
+  0       0             3             0x3450
+  0       1             3             0x1230
+  1       0             3             0x6780
+  2       0             F             0
 
+\end{verbatim}
+
+\begin{table}
+\centering
+\begin{tabular}{c|l}
+ 0 & Write Register N\\
+ 1 & Switch Output N on \\
+ 2 & Write Register N, switch on all \\
+ 3 & Write Register N, switch output N on \\
+ 4 & Switch Output N off \\
+ F & No Operation \\
+\end{tabular}
+\caption{LTC2600 Commands}
+\label{ltc2600cmd}
+\end{table}
 
     
\ No newline at end of file
diff --git a/trb3/MultiTestAddOn.tex b/trb3/MultiTestAddOn.tex
index 145dc5c..f8abbbb 100644
--- a/trb3/MultiTestAddOn.tex
+++ b/trb3/MultiTestAddOn.tex
@@ -1,5 +1,12 @@
 
-\begin{itemize}
+\begin{itemize*}
  \item Schematics \href{http://hades-wiki.gsi.de/pub/DaqSlowControl/TDCReadoutBoardV3/MultiTestAddon1_alles.pdf}{MultiTestAddon1\_alles.pdf}
  \item Pin-out file for the FPGA \href{cvs://:ext:hadaq@lxi001.gsi.de:/misc/hadesprojects/daq/cvsroot/trb3/base/trb3_periph_multitest.lpf}{cvsroot/trb3/base/trb3\_periph\_multitest.lpf}
-\end{itemize}
\ No newline at end of file
+\end{itemize*}
+
+
+\subsubsection{Known bugs}
+\begin{itemize*}
+ \item The serial interface to ADC 1 is not usable - CSB and PDWN are input-only on the FPGA
+ \item LVDS_INP_2 is the only LVDS port that is terminated by an external resistor. Do not switch on corresponding LVDS termiantion in FPGA
+\end{itemize*}
\ No newline at end of file
diff --git a/trb3/main.tex b/trb3/main.tex
index bf6c365..1f4f3dd 100755
--- a/trb3/main.tex
+++ b/trb3/main.tex
@@ -96,7 +96,7 @@
 \tableofcontents
 
 \cleardoublepage
-\part{Ressources}
+\part{Resources}
   \section{Code Repository}
     \input{CodeRepository}
 
diff --git a/trb3/trb3.kilepr b/trb3/trb3.kilepr
index 548f002..3d23ede 100644
--- a/trb3/trb3.kilepr
+++ b/trb3/trb3.kilepr
@@ -108,10 +108,10 @@ order=7
 
 [item:DacProgramming.tex]
 archive=true
-column=0
+column=43
 encoding=UTF-8
 highlight=LaTeX
-line=0
+line=19
 mode=LaTeX
 open=true
 order=9
@@ -188,10 +188,10 @@ order=1
 
 [item:main.tex]
 archive=true
-column=16
+column=22
 encoding=UTF-8
 highlight=LaTeX
-line=140
+line=122
 mode=LaTeX
 open=true
 order=0
@@ -211,8 +211,8 @@ CursorColumn=0
 CursorLine=0
 
 [view-settings,view=0,item:DacProgramming.tex]
-CursorColumn=0
-CursorLine=0
+CursorColumn=43
+CursorLine=19
 
 [view-settings,view=0,item:MultiTestAddOn.tex]
 CursorColumn=0
@@ -243,5 +243,5 @@ CursorColumn=0
 CursorLine=13
 
 [view-settings,view=0,item:main.tex]
-CursorColumn=16
-CursorLine=140
+CursorColumn=22
+CursorLine=122