From: Adrian Weber <adrian.a.weber@exp2.physik.uni-giessen.de>
Date: Sun, 31 Oct 2021 13:31:15 +0000 (+0100)
Subject: add SIG(5) with output of 2.5V to fix startup issue on dirich5s1
X-Git-Url: https://jspc29.x-matter.uni-frankfurt.de/git/?a=commitdiff_plain;h=1f096f582050c25ffed9c15afbf9caf1ad15995a;p=dirich.git

add SIG(5) with output of 2.5V to fix startup issue on dirich5s1
---

diff --git a/dirich5s/dirich5s.vhd b/dirich5s/dirich5s.vhd
index 3284b78..580b605 100644
--- a/dirich5s/dirich5s.vhd
+++ b/dirich5s/dirich5s.vhd
@@ -24,7 +24,7 @@ entity dirich5s is
 --     PWM   : out std_logic_vector(32 downto 1);
 
     --Additional IO
-    SIG        : inout std_logic_vector(4 downto 1);
+    SIG        : inout std_logic_vector(5 downto 1);
     --1:master ready, 2: slave ready, 3-4 trigger, 5 reset
     --LED
     LED_GREEN  : out   std_logic;
@@ -402,6 +402,7 @@ end generate;
   TEST_LINE(10) <= int2med(0).dataready;   -- To SFP
   TEST_LINE(11) <= med2int(0).dataready;   -- from SFP
 
+  SIG(5) <= '1';
 
 ---------------------------------------------------------------------------
 -- LED
diff --git a/dirich5s/par.p2t b/dirich5s/par.p2t
index bf72507..2a3087b 100644
--- a/dirich5s/par.p2t
+++ b/dirich5s/par.p2t
@@ -4,7 +4,8 @@
 #-m nodelist.txt	# Controlled by the compile.pl script.
 #-n 2  			# Controlled by the compile.pl script.
 -s 10
--t 93
+#-t 96
+-t 32
 -c 2
 -e 2
 -i 10
diff --git a/pinout/dirich5s.lpf b/pinout/dirich5s.lpf
index 18adceb..d20e083 100644
--- a/pinout/dirich5s.lpf
+++ b/pinout/dirich5s.lpf
@@ -84,11 +84,12 @@ LOCATE COMP "SIG[1]"                           SITE "N4";
 LOCATE COMP "SIG[2]"                           SITE "N5";
 LOCATE COMP "SIG[3]"                           SITE "M5";
 LOCATE COMP "SIG[4]"                           SITE "M4";
-# LOCATE COMP "SIG[5]"                           SITE "L5";
+LOCATE COMP "SIG[5]"                           SITE "L5";
 IOBUF PORT    "SIG[1]" IO_TYPE=LVCMOS25  DRIVE=8 BANK_VCCIO=2.5 PULLMODE=UP;
 IOBUF PORT    "SIG[2]" IO_TYPE=LVCMOS25  DRIVE=8 BANK_VCCIO=2.5 ;
 IOBUF PORT    "SIG[3]" IO_TYPE=LVCMOS25  DRIVE=8 BANK_VCCIO=2.5;
 IOBUF PORT    "SIG[4]" IO_TYPE=LVCMOS25  DRIVE=8 BANK_VCCIO=2.5;
+IOBUF PORT    "SIG[5]" IO_TYPE=LVCMOS25  DRIVE=4 BANK_VCCIO=2.5;
 
 
 LOCATE COMP "FLASH_CLK"                        SITE "U1";