From: hadeshyp <hadeshyp>
Date: Tue, 21 Aug 2012 07:19:08 +0000 (+0000)
Subject: *** empty log message ***
X-Git-Url: https://jspc29.x-matter.uni-frankfurt.de/git/?a=commitdiff_plain;h=215c7e2e9a813c584723a128ca184900437b2c0f;p=daqdocu.git

*** empty log message ***
---

diff --git a/trb3/GbEGettingStarted.tex b/trb3/GbEGettingStarted.tex
index 05595c3..6e282b6 100644
--- a/trb3/GbEGettingStarted.tex
+++ b/trb3/GbEGettingStarted.tex
@@ -2,7 +2,7 @@ In order to control TRB3 or a larger system with TRB3 as slow control client via
 
 \subsubsection{FPGA design}
 The optical link, activated for the Slow Control over GbE is the one labelled SFP8.
-After loading the design, TRB3 will automatically start to send control packets once per second. With any network monitoring tools (ex. Wireshark) one have to capture such packet and check the source MAC address. This address has to be added to the DHCP configuration on Slow Control server PC.
+After loading the design, TRB3 will automatically start to send control packets once per second. With any network monitoring tools (ex. Wireshark) one have to capture such packet and check the source MAC address. This address has to be added to the DHCP configuration on Slow Control server PC. MAC address is generated basing on the unique ID assigned to each FPGA and a constant part: 02:00:BE:UNIQUE_ID(31 downto 8)
 
 \begin{itemize*}
 \item Open /etc/dhcpd.conf and add an entry specifing hostname and MAC address