From: Maps Date: Thu, 13 Apr 2023 15:41:47 +0000 (+0200) Subject: add option to run I2C with single access due to missing ENINCR line on probecard X-Git-Url: https://jspc29.x-matter.uni-frankfurt.de/git/?a=commitdiff_plain;h=2280ca842abad07c716b9ec6b35f757e9c97e5ba;p=mimosis_chain.git add option to run I2C with single access due to missing ENINCR line on probecard (JM) --- diff --git a/http/htdocs/getdac.pl b/http/htdocs/getdac.pl index 42d589a..5dbf403 100755 --- a/http/htdocs/getdac.pl +++ b/http/htdocs/getdac.pl @@ -19,7 +19,7 @@ $fpga = hex($fpga) if $fpga =~ /^0x/; my $val; for my $i (0x47..0x4c) { - $val = Mimosis::mimosis_register_read($fpga, $i); + $val = Mimosis::mimosis_register_read($fpga, $i,1); #single access mode as default $val &= 0xff; print $val."-"; } diff --git a/http/htdocs/setreg.pl b/http/htdocs/setreg.pl index 16bd8a4..923e4df 100755 --- a/http/htdocs/setreg.pl +++ b/http/htdocs/setreg.pl @@ -9,6 +9,6 @@ eval{ my ($fpga,$reg,$value) = split('-',$ENV{'QUERY_STRING'}); if(!defined $value) {exit 1;} -print("cd ../scripts; ./mimosis_i2c_cmd.pl -f $fpga -r $reg -d $value"); -system("cd ../scripts; ./mimosis_i2c_cmd.pl -f $fpga -r $reg -d $value"); +#print("cd ../scripts; ./mimosis_i2c_cmd.pl -f $fpga -r $reg -d $value"); +system("cd ../scripts; ./mimosis_i2c_cmd.pl -f $fpga -r $reg -d $value -s"); exit 1; diff --git a/scripts/Mimosis.pm b/scripts/Mimosis.pm index ef9fc56..873db9d 100644 --- a/scripts/Mimosis.pm +++ b/scripts/Mimosis.pm @@ -6,7 +6,7 @@ use HADES::TrbNet; use Time::HiRes qw(usleep); #use FileHandle; -use Data::Dumper; +#use Data::Dumper; sub adc_i2c_command { @@ -29,7 +29,7 @@ sub adc_i2c_command { sub mimosis_i2c_command { my ( $fpga, $addr, $cmd, $data, $readwrite, $skipcmd, $wordbyte ) = @_; - + $reg_data = ( $data << 16 ) + ( $cmd << 8 ) + ( $addr << 1 ); $reg_flag = ( $readwrite << 8 ) + ( $skipcmd << 4 ) + $wordbyte; @@ -37,8 +37,7 @@ sub mimosis_i2c_command { # printf( "%x %x %x %x\n", $fpga, $addr, $cmd, $data ); # printf( "%x %x\n", $reg_flag, $reg_data ); - trb_register_write_mem( $fpga, 0xde01, 0, - [ $reg_flag, $reg_data, 0x1 ], 3 ); + trb_register_write_mem( $fpga, 0xde01, 0, [ $reg_flag, $reg_data, 0x1 ], 3 ); } elsif ( $readwrite == 1 ) { @@ -47,14 +46,12 @@ sub mimosis_i2c_command { [ $reg_flag, $reg_data, 0x1 ], 3 ); usleep(1000); my $reg_return = trb_register_read( $fpga, 0xde04 ); - - # print Dumper $reg_return; - return ($reg_return->{$fpga}//0) & 0xffff; + return $reg_return->{$fpga} & 0xffff; } } sub mimosis_register_write { - my ( $fpga, $mimosis_reg, $mimosis_data ) = @_; + my ( $fpga, $mimosis_reg, $mimosis_data, $singleaccess ) = @_; my ( $addr, $cmd, $data ); $addr = 0x12; @@ -62,21 +59,43 @@ sub mimosis_register_write { $data = ( ( $mimosis_reg & 0xff ) << 8 ) + $mimosis_data; # printf( "%x %x\n", $cmd, $data ); - mimosis_i2c_command( $fpga, $addr, $cmd, $data, 0, 0, 1 ); + if ($singleaccess) { + mimosis_i2c_command( $fpga, $addr, 0, $mimosis_reg>>8, 0, 1, 0); + usleep(1000); + mimosis_i2c_command( $fpga, $addr+1, 0, $mimosis_reg, 0, 1, 0); + usleep(1000); + mimosis_i2c_command( $fpga, $addr+2, 0, $mimosis_data, 0, 1, 0); + } + else { + mimosis_i2c_command( $fpga, $addr, $cmd, $data, 0, 0, 1); + } usleep(1000); } sub mimosis_register_read { - my ( $fpga, $mimosis_reg ) = @_; - - my $cmd = ( $mimosis_reg >> 8 ); - my $data = ( $mimosis_reg & 0xff ); - - mimosis_i2c_command( $fpga, 0x12, 0x0, $mimosis_reg, 0, 1, 1 ); + my ( $fpga, $mimosis_reg, $singleaccess) = @_; + my ( $addr, $cmd, $data ); - # printf( "%x %x %x\n", $fpga, $cmd, $data ); + $addr = 0x12; + $cmd = ( $mimosis_reg >> 8 ); + $data = ( $mimosis_reg & 0xff ); + + if ($singleaccess) { + mimosis_i2c_command( $fpga, $addr, 0, $mimosis_reg>>8, 0, 1, 0); + usleep(1000); + mimosis_i2c_command( $fpga, $addr+1, 0, $mimosis_reg, 0, 1, 0); + } + else { + mimosis_i2c_command( $fpga, $addr, $cmd, $data, 0, 0, 0); + } + + # printf( "%x %x %x %x\n", $fpga, $addr, $cmd, $data ); usleep(1000); - return mimosis_i2c_command( $fpga, 0x15, 0x0, 0x0, 1, 1, 0 ); + $addr = 0x15; + $val = mimosis_i2c_command( $fpga, $addr, 0, 0, 1, 1, 0 ); + + # printf( "%x\n", $val ); + return $val; } 1; diff --git a/scripts/basicsettings.pl b/scripts/basicsettings.pl index 6eeeb81..0f508fe 100755 --- a/scripts/basicsettings.pl +++ b/scripts/basicsettings.pl @@ -5,16 +5,17 @@ use Getopt::Long; use HADES::TrbNet; use lib "."; use Mimosis; -use Time::HiRes qw(usleep); -my $fpga = 0xa000; +my $fpga; my @config = do $ARGV[0]; +my $singleaccess; Getopt::Long::Configure(qw(gnu_getopt)); GetOptions( "fpga|f=s" => \$fpga, "file|d=s" => \$file, "help|h" => \$help, + "s" => \$singleaccess, ); if ($help) { @@ -22,12 +23,13 @@ if ($help) { -f, --fpga -> Hex address of the FPGA. Must be provided. -d, --file -> File with configurations. Must be provided. -h, --help -> Print this help. +-s -> Use I2C single access mode for Probestation END_MESSAGE print $message; exit(); } -defined($fpga) ? $fpga = hex($fpga) : die print("Must provide FPGA address.\n"); +$fpga = defined($fpga) ? hex($fpga) : 0xfe82; defined($file) ? @config = do $file : die print("Must provide path to config file.\n"); @@ -37,13 +39,10 @@ trb_init_ports() or die trb_strerror(); foreach my $a (@config) { if ( defined( @$a[1] ) ) { - Mimosis::mimosis_register_write( $fpga, @$a[0], @$a[1] ); - + Mimosis::mimosis_register_write( $fpga, @$a[0], @$a[1], $singleaccess ); usleep(1000); - - # printf( "%x %x %x\n", $fpga, @$a[0], @$a[1] ); + } } -} foreach my $a (@config) { if ( defined( @$a[1] ) ) @@ -56,5 +55,6 @@ foreach my $a (@config) { my $status = (($reg_return->{$fpga}//0) >> 16 ) & 0xff; printf "%x %x Status: %x\n", @$a[0], $val, $status; } + #printf( "%x %x %x\n", $fpga, @$a[0], @$a[1] ); } } diff --git a/scripts/dac_scan/dac_scan_cleanroom.pl b/scripts/dac_scan/dac_scan_cleanroom.pl new file mode 100755 index 0000000..5c6d31c --- /dev/null +++ b/scripts/dac_scan/dac_scan_cleanroom.pl @@ -0,0 +1,160 @@ +#!/usr/bin/perl + +use warnings; +use lib "../"; +use Mimosis; +use HADES::TrbNet; +use Time::HiRes qw(usleep); + +my $fpga = 0xa100; + +my %vdac = ( + 3 => 0x004c, + 4 => 0x0047, + 5 => 0x004d, + 7 => 0x0048, + 8 => 0x0049, + 9 => 0x004a, + 10 => 0x004b, +); + +my %vdac_reset = ( + 3 => 0x53, + 4 => 0x43, + 5 => 0x32, + 7 => 0x53, + 8 => 0x53, + 9 => 0x53, + 10 => 0x53, +); + +my %idac = ( + 1 => 0x0040, + 2 => 0x0042, + 3 => 0x0041, +); + +my %idac_reset = ( + 1 => 0x40, + 2 => 0x1c, + 3 => 0x34, +); + +my %odac = ( + 1 => 0x0045, + 2 => 0x0044, + 6 => 0x0043, +); + +my %odac_reset = ( + 1 => 0x68, + 2 => 0x57, + 6 => 0xab, +); + +$conv_f = ( 2 * 4096 ) / 2**16; + +trb_init_ports() or die trb_strerror(); + +trb_register_write( $fpga, 0xd680, 0x1e ); #write speed 30 to adc + +my $vmon_file = "vmon_data.csv"; +my $imon_file = "imon_data.csv"; +my $other_file = "other_data.csv"; + +open( v_FH, '>', $vmon_file ) or die $!; + +#MONVOLT +for my $dac ( sort keys %vdac ) { #loop over voltage DACs + + printf "Scan: %x\n", $vdac{$dac}; + + Mimosis::mimosis_register_write( $fpga, 0x0026, $dac, 1 ); + usleep(1000); + + for my $setv ( 0 .. 2**8 - 1 ) { #loop over settings + + Mimosis::mimosis_register_write( $fpga, $vdac{$dac}, $setv, 1 ); + usleep(10000); + Mimosis::adc_i2c_command( $fpga, 0x48, 0x01, 0xa380, 0, 0, 1 ); + usleep(10000); + $volt_raw = Mimosis::adc_i2c_command( $fpga, 0x48, 0x0, 0x0, 1, 0, 1 ); + + # printf( "%x\t%i\t%i\n", $vdac{$dac}, $setv, $volt_raw ); + printf( v_FH "%x\t%f\t%i\n", $vdac{$dac}, $setv, $volt_raw * $conv_f ); + } + + Mimosis::mimosis_register_write( $fpga, $vdac{$dac}, $vdac_reset{$dac}, 1 ); + + usleep(10000); + + # printf("\n\n"); + printf( v_FH "\n\n" ); +} + +close(v_FH); + +open( i_FH, '>', $imon_file ) or die $!; + +#MONCURR +for my $dac ( sort keys %idac ) { #loop over current DACs + + printf "Scan: %x\n", $idac{$dac}; + + Mimosis::mimosis_register_write( $fpga, 0x0025, $dac,1 ); + usleep(1000); + + for my $seti ( 0 .. 2**8 - 1 ) { #loop over settings + + Mimosis::mimosis_register_write( $fpga, $idac{$dac}, $seti, 1 ); + usleep(10000); + Mimosis::adc_i2c_command( $fpga, 0x48, 0x01, 0x9380, 0, 0, 1 ); + usleep(10000); + $curr_raw = Mimosis::adc_i2c_command( $fpga, 0x48, 0x0, 0x0, 1, 0, 1 ); + + # printf( "%x\t%i\t%i\n", $idac{$dac}, $seti, $curr_raw ); + printf( i_FH "%x\t%i\t%i\n", $idac{$dac}, $seti, $curr_raw * $conv_f ); + } + + Mimosis::mimosis_register_write( $fpga, $idac{$dac}, $idac_reset{$dac},1 ); + usleep(10000); + + # printf("\n\n"); + printf( i_FH "\n\n" ); +} + +close(i_FH); + +open( o_FH, '>', $other_file ) or die $!; + +#MONVOLT_others +for my $dac ( sort keys %odac ) { + + printf "Scan: %x\n", $odac{$dac}; + + Mimosis::mimosis_register_write( $fpga, 0x0026, $dac,1 ); + usleep(1000); + + for my $setv ( 0 .. 2**8 - 1 ) { #loop over settings + + Mimosis::mimosis_register_write( $fpga, $odac{$dac}, $setv,1 ); + usleep(10000); + Mimosis::adc_i2c_command( $fpga, 0x48, 0x01, 0xa380, 0, 0, 1 ); + usleep(10000); + $volt_raw = Mimosis::adc_i2c_command( $fpga, 0x48, 0x0, 0x0, 1, 0, 1 ); + + # printf( "%x\t%i\t%i\n", $odac{$dac}, $setv, $volt_raw ); + printf( o_FH "%x\t%i\t%i\n", $odac{$dac}, $setv, $volt_raw * $conv_f ); + } + + Mimosis::mimosis_register_write( $fpga, $odac{$dac}, $odac_reset{$dac},1 ); + usleep(10000); + + # printf("\n\n"); + printf( o_FH "\n\n" ); +} + +close(o_FH); + +system("gnuplot plotdacpng.gp"); +system("gnuplot -p plotdac.gp"); diff --git a/scripts/mimosis_i2c_cmd.pl b/scripts/mimosis_i2c_cmd.pl index 3165d21..edebe16 100755 --- a/scripts/mimosis_i2c_cmd.pl +++ b/scripts/mimosis_i2c_cmd.pl @@ -7,7 +7,7 @@ use Time::HiRes qw(usleep); use lib "."; use Mimosis; -my ( $fpga, $addr, $cmd, $cmd_t, $data, $data_t, $word ); +my ( $fpga, $addr, $cmd, $cmd_t, $data, $data_t, $word, $singleaccess ); Getopt::Long::Configure(qw(gnu_getopt)); GetOptions( @@ -15,6 +15,7 @@ GetOptions( "mimosis-reg|r=s" => \$reg_t, "mimosis-data|d=s" => \$data_t, "help|h" => \$help_t, + "s" => \$singleaccess, ); if ($help_t) { @@ -22,6 +23,7 @@ if ($help_t) { -f, --fpga -> Hex address of the FPGA. -r, --mimosis-reg -> Hex register to write to. -d, --mimosis-data -> Data to write, if specified. If not, data will be red. Hex or dec values allowed. +-s -> Use single I2C register access for probe station -h, --help -> Print this help. END_MESSAGE print $message; @@ -34,14 +36,15 @@ if ( defined $fpga_t && defined $reg_t) { } else {die print "Must provide FPGA address and register.\n";} + trb_init_ports() or die trb_strerror(); if ( defined($data_t) ) { $data_t = hex($data_t) if ( $data_t =~ /^0x/ ); - Mimosis::mimosis_register_write( $fpga_t, $reg_t, $data_t ); + Mimosis::mimosis_register_write( $fpga_t, $reg_t, $data_t, $singleaccess ); exit(); } else { - printf "%x\n", Mimosis::mimosis_register_read( $fpga_t, $reg_t ); + printf "%x\n", Mimosis::mimosis_register_read( $fpga_t, $reg_t, $singleaccess ); exit(); } diff --git a/scripts/start_probestation.sh b/scripts/start_probestation.sh new file mode 100755 index 0000000..7ca6947 --- /dev/null +++ b/scripts/start_probestation.sh @@ -0,0 +1,51 @@ +#!/bin/bash +#echo Reset and Config TrbNet +#cd ../trbnet/ +#./start.sh +#cd - + +echo Mimosis reset +cd ../git/daqtools/xml-db +./put.pl Mimosis 0xfe82 MimosisReset 0 +sleep .1 +./put.pl Mimosis 0xfe82 MimosisReset 1 +sleep .1 +cd - + +echo Load basic settings +./basicsettings.pl -s -d conf/CONF_allregisters.pl --fpga 0xfe82 +sleep .1 +./basicsettings.pl -s -d conf/CONF_testmode_enable.pl --fpga 0xfe82 +sleep .1 + +echo Bit and word align +cd ../git/daqtools/xml-db +./put.pl Mimosis 0xfe82 InputReset 1 +./put.pl Mimosis 0xfe82 InputReset 0 +sleep .1 +./get.pl Mimosis 0xfe82 DelayPosition +sleep .1 +./put.pl Mimosis 0xfe82 AlignFixed 0 +sleep .1 +./put.pl Mimosis 0xfe82 AlignFixed 1 +./get.pl Mimosis 0xfe82 LastWord +cd - + + +./basicsettings.pl -s -d conf/CONF_testmode_disable.pl --fpga 0xfe82 + +cd ../git/daqtools/xml-db +#./get.pl Mimosis 0xfe82 CounterHeader rates #nicht implementiert... +./get.pl Mimosis 0xfe82 FrameLength +cd - + +echo Config CTS +#01.317 setup +trbcmd w 0xc000 0xa146 0x000186a0 #1kHz pulser +trbcmd loadbit 0xc000 0xa14f 0x000000f0 0x00000080 #trigger type 8 +trbcmd setbit 0xc000 0xa101 0x2 #trigger on + +#Probestation setup +trbcmd w 0xc100 0xa13b 0x000186a0 #1kHz pulser +trbcmd loadbit 0xc100 0xa144 0x000000f0 0x00000080 #trigger type 8 +trbcmd setbit 0xc100 0xa101 0x2 #trigger on