From: hadeshyp Date: Thu, 12 Aug 2010 11:53:04 +0000 (+0000) Subject: *** empty log message *** X-Git-Url: https://jspc29.x-matter.uni-frankfurt.de/git/?a=commitdiff_plain;h=22f59311297d83c29ce2a62aabd1c1b3dc425758;p=daqdocu.git *** empty log message *** --- diff --git a/fanpw_poti.png b/fanpw_poti.png new file mode 100644 index 0000000..e326294 Binary files /dev/null and b/fanpw_poti.png differ diff --git a/mdc.tex b/mdc.tex index 98c76d4..ba32379 100755 --- a/mdc.tex +++ b/mdc.tex @@ -4,6 +4,14 @@ The schematics of the MDC OEP v3 can be found in \cite{MDCOEP}. The schematics o %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% \subsection{IPU Data Format} %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% +Each word sent by an OEP can be of three types as shown in table \ref{MDCDataFormat}: +\begin{itemize} + \item The standard, compressed data format with two hits in one data word + \item The long, debug format, with one word per hit. + \item Status words which can be of several types, see table \ref{MDCDataFormatStatusWords} +\end{itemize} + + \begin{table}[hb] \begin{center} \begin{tabular}{|c|c|c|c|} @@ -14,10 +22,10 @@ The schematics of the MDC OEP v3 can be found in \cite{MDCOEP}. The schematics o 31 & 0 & 1 & 0 \\ 30 & 0 & 0 & 1 \\ 29 & 0 & 0 & 0 \\ -28 .. 25 & TDC number & TDC number & status data \\ -24 .. 22 & TDC channel & TDC channel & status data \\ -21 .. 11 & Bit 21: Hit number, rest 0 & ADC data - Hit 1 & status data \\ -10 .. 0 & ADC data & ADC data - Hit 0 & status data \\ +28 -- 25 & TDC number & TDC number & word code \\ +24 -- 22 & TDC channel & TDC channel & 24: code, 23..0: data \\ +21 -- 11 & Bit 21: Hit number, rest 0 & ADC data - Hit 1 & data \\ +10 -- 0 & ADC data & ADC data - Hit 0 & data \\ \hline \end{tabular} \caption{MDC data format} @@ -25,6 +33,32 @@ The schematics of the MDC OEP v3 can be found in \cite{MDCOEP}. The schematics o \end{center} \end{table} +\begin{table}[hb] +\begin{center} +\begin{tabularx}{\textwidth}{|c|c|X|c|} +\hline +\textbf{Name} & \textbf{Code} & \textbf{Content} & \textbf{Note}\\ +\hline +\hline +Basic Information & 0x00 & Bit 15 -- 0: Internal trigger number, Bit 16: Short MBO, Bit 17: Long MBO, Bit 18: CMS active & \\ +Token Missing & 0x01 & Bit 23 -- 0: Number of missing token & 1\\ +Phys. Triggers & 0x02 & Bit 23 -- 0: Number of received triggers & 1 \\ +Calib. Triggers & 0x03 & Bit 23 -- 0: Number of received calibration triggers & 1 \\ +Discarded Hit 1 & 0x04 & Bit 23 -- 0: Number of discarded hit~1 words from TDC due to threshold setting & 1 \\ +Discarded Hit 0 & 0x05 & Bit 23 -- 0: Number of discarded hit~0 words from TDC due to threshold setting & 1 \\ +Discarded Words & 0x06 & Bit 23 -- 0: Number of discarded words due to limit of words per event & 1 \\ +Truncated Events& 0x07 & Bit 23 -- 0: Number of truncated events due to limit of words per event & 1 \\ +Single Hit 1 & 0x08 & Bit 23 -- 0: Number of single, double or triple hit 1 & 1 \\ +Single Hit 0 & 0x09 & Bit 23 -- 0: Number of single, double or triple hit 0 & 1 \\ +Retransmit Req. & 0x0A & Bit 11 -- 0: Number of retransmit requests sent, Bit 23 -- 12: Number of retransmit requests received & 1\\ +Dummy Word & 0x1E & Dummy data word. Sent in every event when selected by CCR2 Bit 22 (see table \ref{MDCCommonCtrlReg2}). Bit 23 -- 16: Lower 8 bit of trigger number. Bit 11 -- 0: Word counter & \\ +Debug Word & 0x1F & Debug word. Sent in every event when selected by CCR2 Bit 30 (see table \ref{MDCCommonCtrlReg2}). Bit 15 -- 0: Trigger number & \\ +\hline +\end{tabularx} +\caption{MDC status words. Note 1: is reset when CCR0 Bit 5 is set. In the 0xE-event, the relative counter value since the last 0xE-event is shown. The status words 0x00 to 0x1D are also available in the address range 0x9100 to 0x911D. Here, the absolute counter value is read.} +\label{MDCDataFormatStatusWords} +\end{center} +\end{table} %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% \subsection{Memory Map} @@ -38,6 +72,7 @@ The schematics of the MDC OEP v3 can be found in \cite{MDCOEP}. The schematics o \hline 8000 - 803F & ADC & Voltage monitoring ADC. see table \ref{MDCOEPADCMemoryMap} \\ 9000 - 90FF & Status & Status of the various state machines and control signals \\ +9100 - 91FF & Statistics & Various statistics regarding data and MBO status. For details see table \ref{MDCDataFormatStatusWords}. N.B. in these registers the cummulative values are shown. \\ A000 - A0FF & Config. Mem. & Configuration memory for thresholds and TDC settings \\ D000 & SPI Status Reg. & see section SPI Flash \\ D001 & SPI Control Reg. & see section SPI Flash \\ @@ -229,15 +264,13 @@ The ADC monitoring most voltages on each OEP can be accessed using register addr \item[Bit 2] CMS active \end{description} - \item[0x9001: \filename{Trigger\_Handler} status register] ~ \begin{description} - \item[Bit 3..0] State machine: 0: Idle, 1: Begrun, 2: timing trigger, 3: calibration trigger, 4: do readout + \item[Bit 3..0] State machine: 0: Idle, 1: Begrun, 2: timing trigger, 3: calibration trigger, 4: do readout, 5: wait for data, 6: release lvl1, 7: do reinit, 8: do reinit 2 \end{description} - \item[0x9002: \filename{Data\_Handler} status register]~ \begin{description} - \item[Bit 3 -- 0] State machine status + \item[Bit 3 -- 0] State machine status \\ 0: idle, 1: send data, 2: send long data, 3: send dummy, 4: finish, 5: write debug word, 6: prepare status information, 7: send status information \item[Bit 4] Start Readout \item[Bit 5] Finished Readout \item[Bit 6] Data Write Enable @@ -309,7 +342,7 @@ The ADC monitoring most voltages on each OEP can be accessed using register addr %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% -\subsection{Board Positions} +\subsection{Hardware} %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% \subsubsection{MDC OEP Positions} @@ -323,4 +356,26 @@ Figure \ref{fig:mdcoeppositions} shows the positions of each OEP on the chambers \end{figure} \subsubsection{MDC AddOn Connections} -Due to very different cable length, there is no clear rule where which OEP is connected. See section \ref{mdcaddonconnections} for details. \ No newline at end of file +Due to very different cable length, there is no clear rule where which OEP is connected. See section \ref{mdcaddonconnections} for details. + +%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% +\subsubsection{FanPW} +%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% +One voltage regulator block on the FanPW is shown in figure \ref{fanpw}. The position of each of the five potentiometers is shown. + +The suggested voltage settings are: +\begin{itemize} + \item 6V: Set to 5.85V, resp. 6.2V due to heavy noise on power cable + \item 3.8V: Set to 3.8V, resp. 4.1V + \item 1.8V: Set to 1.8V, resp. 2.1V + \item +3V: Set to approx. 3.1V (should be 3.0V $\pm$ 0.05V on the OEP) + \item -3V: Set to approx. -3.1V (should be -3.0V $\pm$ 0.05V on the OEP) +\end{itemize} + + +\begin{figure} + \centering + \includegraphics[width=.7\textwidth]{fanpw_poti.png} +\caption{FanPW potentiometer positions.} +\label{fanpw} +\end{figure} diff --git a/slowcontrol.tex b/slowcontrol.tex index e89ab55..7ca5d94 100755 --- a/slowcontrol.tex +++ b/slowcontrol.tex @@ -325,18 +325,19 @@ A detailed bit definition can be found in table~\ref{CommonCtrlReg2}. \begin{table} \begin{center} -\begin{tabular}{|c|c|} +\begin{tabularx}{\textwidth}{|c|X|} \hline \textbf{Bits} & \textbf{Description} \\ \hline\hline -31 -- 9 & reserved \\ -8 & link error, e.g. code violation received \\ +31 -- 24 & Number of retransmit requests in media interface (written by media interface, connected in top level entity)\\ +23 -- 9 & reserved \\ +8 & link error, e.g. code violation received (written by endpoint)\\ 7 -- 4 & reserved \\ -3 -- 0 & counter for received network resets \\ +3 -- 0 & counter for received network resets (written by endpoint) \\ \hline -\end{tabular} +\end{tabularx} \caption{Common Status Register 4 (CSR4)} -\label{CommonCtrlReg4} +\label{CommonStatReg4} \end{center} \end{table} @@ -355,7 +356,8 @@ A detailed bit definition can be found in table~\ref{CommonCtrlReg2}. 15 & reboot FPGA \\ 14 -- 11 & reserved \\ 10 & reset sequence counter \\ -9 -- 4 & reserved \\ +9 -- 6 & reserved \\ +5 & reset status registers / error counters \\ 4 & reset persistent error flags \\ 3 & master reset \\ 2 & empty IPU chain / reset IPU logic \\