From: Tobias Weber Date: Fri, 22 Jun 2018 08:10:07 +0000 (+0200) Subject: moving some constants into vhdl package. X-Git-Url: https://jspc29.x-matter.uni-frankfurt.de/git/?a=commitdiff_plain;h=26d43569eee86fd00f70975b4283be8f84053321;p=trb3.git moving some constants into vhdl package. --- diff --git a/mupix/Mupix8/sources/MuPixUnpacker.vhd b/mupix/Mupix8/sources/MuPixUnpacker.vhd index cd4ccb7..b628e51 100644 --- a/mupix/Mupix8/sources/MuPixUnpacker.vhd +++ b/mupix/Mupix8/sources/MuPixUnpacker.vhd @@ -43,9 +43,6 @@ architecture RTL of MupixUnpacker is signal hit_reg : std_logic; signal link_flag_reg : std_logic; - constant k28_5 : std_logic_vector(7 downto 0) := x"bc"; - constant k28_0 : std_logic_vector(7 downto 0) := x"1c"; - begin diff --git a/mupix/Mupix8/sources/constants.vhd b/mupix/Mupix8/sources/constants.vhd new file mode 100644 index 0000000..bead1ca --- /dev/null +++ b/mupix/Mupix8/sources/constants.vhd @@ -0,0 +1,12 @@ +library IEEE; +use IEEE.std_logic_1164.all; +use IEEE.numeric_std.all; + +package Constants is + + constant c_mupixhitsize : integer := 40; -- Link(8) & Row(8) & Col(8) & Charge(7) & TS(9) in hit mode + -- binary counter(24) & link(4) & x"3" & gray counter + constant k28_5 : std_logic_vector(7 downto 0) := x"bc"; + constant k28_0 : std_logic_vector(7 downto 0) := x"1c"; + +end package Constants;