From: Jan Michel <j.michel@gsi.de>
Date: Tue, 28 Jun 2022 14:51:49 +0000 (+0200)
Subject: add TDC configuration option for dual edge in different channels
X-Git-Url: https://jspc29.x-matter.uni-frankfurt.de/git/?a=commitdiff_plain;h=2ddcf4b9ce63ce8d4391f302e17900dff4db950a;p=trb3sc.git

add TDC configuration option for dual edge in different channels
---

diff --git a/tdctemplate/config_48_crate_4conn_start_dualchannel.vhd b/tdctemplate/config_48_crate_4conn_start_dualchannel.vhd
index 8775760..440fdc0 100644
--- a/tdctemplate/config_48_crate_4conn_start_dualchannel.vhd
+++ b/tdctemplate/config_48_crate_4conn_start_dualchannel.vhd
@@ -48,8 +48,8 @@ package config is
     constant USE_RXCLOCK            : integer := c_NO;
    
 --Address settings   
-    constant INIT_ADDRESS           : std_logic_vector := x"F3CF";
-    constant BROADCAST_SPECIAL_ADDR : std_logic_vector := x"74";
+    constant INIT_ADDRESS           : std_logic_vector := x"F3C6";
+    constant BROADCAST_SPECIAL_ADDR : std_logic_vector := x"76";
    
 --set to 0 for backplane serdes, set to 3 for front SFP serdes
     constant SERDES_NUM             : integer := 0;
diff --git a/tdctemplate/trb3sc_tdctemplate.vhd b/tdctemplate/trb3sc_tdctemplate.vhd
index 79fc1b5..2056ad6 100644
--- a/tdctemplate/trb3sc_tdctemplate.vhd
+++ b/tdctemplate/trb3sc_tdctemplate.vhd
@@ -313,7 +313,7 @@ end generate;
   THE_BUS_HANDLER : entity work.trb_net16_regio_bus_handler_record
     generic map(
       PORT_NUMBER      => 5,
-      PORT_ADDRESSES   => (0 => x"d000", 1 => x"b000", 2 => x"d300", 3 => x"c000", 4 => x"b000", others => x"0000"),
+      PORT_ADDRESSES   => (0 => x"d000", 1 => x"b000", 2 => x"d300", 3 => x"c000", 4 => x"e000", others => x"0000"),
       PORT_ADDR_MASK   => (0 => 12, 1 => 9, 2 => 1, 3 => 12, 4 => 5, others => 0),
       PORT_MASK_ENABLE => 1
       )
@@ -401,10 +401,10 @@ end generate;
 -- I/O
 ---------------------------------------------------------------------------
 
---  RJ_IO(1 downto 0) <= trig_gen_out_i(3 downto 2);
+  RJ_IO(1 downto 0) <= trig_gen_out_i(3 downto 2);
   RJ_IO(3 downto 2) <= trig_gen_out_i(1 downto 0);
-  RJ_IO(0) <= clk_full_osc;
-  RJ_IO(1) <= clk_sys;
+  --RJ_IO(0) <= clk_full_osc;
+  --RJ_IO(1) <= clk_sys;
 
   BACK_GPIO(1 downto 0)  <= (others => 'Z');
   BACK_GPIO(3 downto 2)  <= trig_gen_out_i(3 downto 2);