From: hadeshyp Date: Mon, 4 Jul 2011 11:15:47 +0000 (+0000) Subject: *** empty log message *** X-Git-Url: https://jspc29.x-matter.uni-frankfurt.de/git/?a=commitdiff_plain;h=2f26168c1045b2772c60a8809f546846403adc31;p=daqdocu.git *** empty log message *** --- diff --git a/daqnet.kilepr b/daqnet.kilepr index a0fa3d7..89c09e6 100755 --- a/daqnet.kilepr +++ b/daqnet.kilepr @@ -4,7 +4,7 @@ img_extIsRegExp=false img_extensions=.eps .jpg .jpeg .png .pdf .ps .fig .gif kileprversion=2 kileversion=2.0.86 -lastDocument=hubs.tex +lastDocument=slowcontrol.tex masterDocument=main.tex name=daqnet pkg_extIsRegExp=false @@ -540,13 +540,13 @@ order=22 [item:slowcontrol.tex] archive=true -column=29 +column=18 encoding=UTF-8 highlight=LaTeX -line=444 +line=334 mode=LaTeX -open=false -order=4 +open=true +order=14 [item:software.tex] archive=true @@ -667,8 +667,8 @@ CursorColumn=0 CursorLine=0 [view-settings,view=0,item:slowcontrol.tex] -CursorColumn=29 -CursorLine=444 +CursorColumn=18 +CursorLine=334 [view-settings,view=0,item:software.tex] CursorColumn=21 diff --git a/lvl1trigger.tex b/lvl1trigger.tex index 91eec09..eb143a3 100755 --- a/lvl1trigger.tex +++ b/lvl1trigger.tex @@ -166,11 +166,11 @@ In case a board has not been configured correctly to deliver proper data, this i 16 & trg. counter mismatch & The internal trigger number does not match the received trigger number. Set by trigger interface or user. \\ 17 & timing trg missing & A LVL1 trigger has been received which needs a timing trigger, but no timing trigger was seen. Set by trigger interface or user. \\ 18 & multiple timing trg & There were two signals on the timing input but only one LVL1 trigger \\ -19 & t.b.d. & Not yet defined \\ +19 & severe front-end error & The front-end shows a severe error that requires external aid \\ 20 & buffers half full & The event data buffers are filled halfway. Set by user. \\ 21 & buffers almost full & The event data buffers are almost full. Set by user. \\ 22 & not configured & Frontend is not configured correctly to handle triggers, an initilization is needed. Set by user. \\ -23 & frontend error & Parts of the connected frontend are not behaving correctly: no response, not synchronized, token missing...\\ +23 & frontend error & Parts of the connected frontend are not behaving correctly: no response, not synchronized, token missing... The error is either not permanent or can be handled internally\\ 24 & spike detected & A spike was detected on the timing trigger input. \\ 25 & trigger timeout & The delay between timing trigger and LVL1 trigger was longer than expected \\ 26 - 31 & t.b.d. & Not yet defined \\ diff --git a/mdc.tex b/mdc.tex index f06468c..6a475ba 100755 --- a/mdc.tex +++ b/mdc.tex @@ -54,13 +54,14 @@ Retransmit Req. & 0x0A & Bit 11 -- 0: Number of retransmit requests sent, Bit 23 Words & 0x0B & Bit 23 -- 0: Number of words given to data handler & 1\\ Invalid Trg. & 0x0C & Bit 15 -- 0: Number of invalid triggers received & 1 \\ Multiple Trg. & 0x0D & Bit 15 -- 0: Number of multiple triggers received & 1 \\ -Spikes Trg. & 0x0E & Bit 15 -- 0: Number of spikes on CMS received & 1 \\ +Spikes Trg. & 0x0E & Bit 15 -- 0: Number of spikes on CMS (synchronous) received & 1 \\ Spurious Trg. & 0x0F & Bit 15 -- 0: Number of spurious triggers received & 1 \\ Idle Time & 0x10 & Bit 23 -- 0: Idle time of the trigger handler state machine in ${{\mu}s}$ & \\ Init Time & 0x11 & Bit 23 -- 0: Time the OEP spent for reinitalizations in ${{\mu}s}$ & \\ Calib Time & 0x12 & Bit 23 -- 0: Time the OEP spent with calibration in ${{\mu}s}$ & \\ Readout Time & 0x13 & Bit 23 -- 0: Time while reading data from TDC in ${{\mu}s}$ & \\ Waiting Time & 0x14 & Bit 23 -- 0: Time spent with various small waits in ${{\mu}s}$ & \\ +Real Spikes CMS & 0x15 & Bit 23 -- 0: Number of spikes on CMS (asynchrous) & \\ Dummy Word & 0x1E & Dummy data word. Sent in every event when selected by CCR2 Bit 22 (see table \ref{MDCCommonCtrlReg2}). Bit 23 -- 16: Lower 8 bit of trigger number. Bit 11 -- 0: Word counter & \\ Debug Word & 0x1F & Debug word. Sent in every event when selected by CCR2 Bit 30 (see table \ref{MDCCommonCtrlReg2}). Bit 15 -- 0: Trigger number & \\ \hline diff --git a/slowcontrol.tex b/slowcontrol.tex index 3716e3a..5c11af0 100755 --- a/slowcontrol.tex +++ b/slowcontrol.tex @@ -274,31 +274,31 @@ A detailed bit definition can be found in table~\ref{CommonCtrlReg2}. \begin{table} \begin{center} -\begin{tabular}{|c|c|} +\begin{tabularx}{\textwidth}{cXcccc} \hline -\textbf{Bits} & \textbf{Description} \\ +\textbf{Bits} & \textbf{Description} & \textbf{EP} & \textbf{EPF} & \textbf{U} & \textbf{RST} \\ \hline\hline -31 -- 20 & temperature \\ -19 -- 16 & reserved \\ -15 & Link error (e.g. code violation) \\ -14 & Single Event Upset detected \\ -13 & Timing Trigger Input \\ -12 & Last event sent on IPU is broken\\ -11 & Severe problem in event data buffer / IPU request handler\\ -10 & IPU requested event partially not found / data missing\\ -9 & IPU Event not found\\ -8 & Timing trigger missing\\ -7 & Frontend error\\ -6 & Frontend not configured\\ -5 & IPU channel counter mismatch \\ -4 & LVL1 trigger counter mismatch \\ -3 & note flag\\ -2 & warning flag \\ -1 & error flag \\ -0 & serious error flag \\ +31 -- 20 & temperature & & & & \\ +19 -- 16 & reserved & & & & \\ +15 & Link error (e.g. code violation) & X & - & - & 4 \\ +14 & Single Event Upset detected & o & & & \\ +13 & Timing Trigger Input & X & - & - & n/a \\ +12 & Last event sent on IPU is broken & o & & & \\ +11 & Severe problem in event data buffer / IPU request handler & o & X & X & 4 \\ +10 & IPU requested event partially not found / data missing & o & X & X & 4 \\ +9 & IPU Event not found & o & X & X & 4 \\ +8 & Timing trigger missing & X & - & - & 4 \\ +7 & Frontend error & o & o & X & \\ +6 & Frontend not configured & o & X & X & n/a \\ +5 & IPU channel counter mismatch & o & o & o & \\ +4 & LVL1 trigger counter mismatch & X & - & - & n/a \\ +3 & note flag & o & o & X & n/a \\ +2 & warning flag & o & o & X & n/a \\ +1 & error flag & o & o & X & n/a \\ +0 & serious error flag & o & o & X & n/a \\ \hline -\end{tabular} -\caption{Common Status Register 0 (CSR0)} +\end{tabularx} +\caption{Common Status Register 0 (CSR0). X: entity changes value, -: entity not allowed to change, o:entity may change but doesn't. EP: Endpoint, EPF: Endpoint full handler, U: User, RST: reset signal} \label{CommonStatReg0} \end{center} \end{table} @@ -331,7 +331,11 @@ A detailed bit definition can be found in table~\ref{CommonCtrlReg2}. 13 & multiple timing triggers found \\ 12 & trigger number match \\ 11 & timeout found \\ -10 -- 4 & reserved \\ +10 -- 8 & reserved \\ +7 & wrong polarity \\ +6 & spurious trigger\\ +5 & missing trigger\\ +4 & short timing trigger\\ 3 -- 0 & Status of LVL1 handler state machine. 0: idle, 1: timing trigger found, 3: LVL1 trigger received, 5: bad combination of timing trigger and LVL1 trigger, 7: done.\\ \hline \end{tabularx} @@ -419,7 +423,7 @@ A detailed bit definition can be found in table~\ref{CommonCtrlReg2}. \textbf{Bits} & \textbf{Description} \\ \hline\hline 31 -- 16 & Number of spurious triggers (i.e. timing triggers preceeding a timing triggerless trigger) \\ -15 -- 0 & Number of spikes seen on the timing trigger input \\ +15 -- 0 & Number of spikes seen on the timing trigger input (sampled with system clock) \\ \hline \end{tabularx} \caption{Common Status Register 7 (CSR7): LVL1 handler statistics 2} @@ -427,6 +431,21 @@ A detailed bit definition can be found in table~\ref{CommonCtrlReg2}. \end{center} \end{table} +\begin{table} +\begin{center} +\begin{tabularx}{\textwidth}{|c|X|} +\hline +\textbf{Bits} & \textbf{Description} \\ +\hline\hline +31 -- 16 & reserved \\ +15 -- 0 & Number of spikes seen on the timing trigger input using asynchronous circuitry\\ +\hline +\end{tabularx} +\caption{Common Status Register 8 (CSR8): LVL1 handler statistics 3} +\label{CommonStatReg8} +\end{center} +\end{table} + \begin{table} \begin{center} diff --git a/trigger.tex b/trigger.tex index 6ca1a31..67fb07d 100644 --- a/trigger.tex +++ b/trigger.tex @@ -11,7 +11,7 @@ The inputs to the central base line restorer boards are: First six inputs are th \begin{figure} \centering - \includegraphics[width=.9\textheight,angle=90]{triggercable.pdf} + \includegraphics[width=.9\textheight,angle=90]{trigger_distribution.png} \caption{Trigger Cables between CTS and detectors. Black times are delay requirements, red times are measured latencies.} \label{trigger_cables} \end{figure} @@ -20,4 +20,4 @@ The inputs to the central base line restorer boards are: First six inputs are th \includegraphics[width=.9\textheight,angle=90]{trigger_to_cts.pdf} \caption{Trigger Cables between detectors and CTS.} \label{trigger_to_cts} -\end{figure} \ No newline at end of file +\end{figure} diff --git a/trigger_distribution.png b/trigger_distribution.png new file mode 100644 index 0000000..689128e Binary files /dev/null and b/trigger_distribution.png differ