From: Jan Michel Date: Fri, 10 Feb 2023 13:04:47 +0000 (+0100) Subject: add reset and reload to gbe standalone X-Git-Url: https://jspc29.x-matter.uni-frankfurt.de/git/?a=commitdiff_plain;h=3245fdf3a3625e0cfbc5bd33f267703764236f62;p=trb5sc.git add reset and reload to gbe standalone --- diff --git a/gbe_standalone/config.vhd b/gbe_standalone/config.vhd index 78fc960..a96e7d6 100644 --- a/gbe_standalone/config.vhd +++ b/gbe_standalone/config.vhd @@ -106,8 +106,6 @@ function generateIncludedFeatures return std_logic_vector is t(14 downto 12) := std_logic_vector(to_unsigned(RING_BUFFER_SIZE,3)); t(15) := '1'; --TDC t(17 downto 16) := std_logic_vector(to_unsigned(NUM_TDC_MODULES-1,2)); - - t(40 downto 40) := std_logic_vector(to_unsigned(INCLUDE_LCD,1)); t(42 downto 42) := std_logic_vector(to_unsigned(INCLUDE_SPI,1)); t(43 downto 43) := std_logic_vector(to_unsigned(INCLUDE_UART,1)); t(44 downto 44) := std_logic_vector(to_unsigned(INCLUDE_STATISTICS,1)); diff --git a/gbe_standalone/trb5sc_gbe_template.prj b/gbe_standalone/trb5sc_gbe_template.prj index bd8fe46..94ee45e 100644 --- a/gbe_standalone/trb5sc_gbe_template.prj +++ b/gbe_standalone/trb5sc_gbe_template.prj @@ -255,7 +255,8 @@ add_file -vhdl -lib work "../../trbnet/gbe_trb/base/trb_net16_gbe_receive_contro add_file -vhdl -lib work "../../trbnet/gbe_trb/base/trb_net16_gbe_main_control.vhd" add_file -vhdl -lib work "../../trbnet/gbe_trb/base/trb_net16_gbe_mac_control.vhd" add_file -vhdl -lib work "../../trbnet/gbe_trb/base/trb_net16_gbe_protocol_prioritizer.vhd" -add_file -vhdl -lib work "../../trbnet/gbe_trb/base/trb_net16_gbe_protocol_selector.vhd" +#add_file -vhdl -lib work "../../trbnet/gbe_trb/base/trb_net16_gbe_protocol_selector.vhd" +add_file -vhdl -lib work "../../trbnet/gbe_trb/base/gbe_protocol_selector.vhd" add_file -vhdl -lib work "../../trbnet/gbe_trb/base/trb_net16_gbe_frame_trans.vhd" add_file -vhdl -lib work "../../trbnet/gbe_trb/base/trb_net16_gbe_frame_constr.vhd" add_file -vhdl -lib work "../../trbnet/gbe_trb/base/trb_net16_gbe_transmit_control2.vhd" @@ -264,11 +265,12 @@ add_file -vhdl -lib work "../../trbnet/gbe_trb/base/trb_net16_gbe_event_constr.v add_file -vhdl -lib work "../../trbnet/gbe_trb/base/trb_net16_gbe_setup.vhd" add_file -vhdl -lib work "../../trbnet/gbe_trb/base/ip_configurator.vhd" add_file -vhdl -lib work "../../trbnet/gbe_trb/protocols/trb_net16_gbe_response_constructor_ARP.vhd" -add_file -vhdl -lib work "../../trbnet/gbe_trb/protocols/trb_net16_gbe_response_constructor_Ping.vhd" +#add_file -vhdl -lib work "../../trbnet/gbe_trb/protocols/trb_net16_gbe_response_constructor_Ping.vhd" +add_file -vhdl -lib work "../../trbnet/gbe_trb/protocols/gbe_response_constructor_Ping.vhd" add_file -vhdl -lib work "../../trbnet/gbe_trb/protocols/trb_net16_gbe_response_constructor_DHCP.vhd" add_file -vhdl -lib work "../../trbnet/gbe_trb/protocols/trb_net16_gbe_response_constructor_SCTRL.vhd" add_file -vhdl -lib work "../../trbnet/gbe_trb/protocols/trb_net16_gbe_response_constructor_TrbNetData.vhd" -add_file -vhdl -lib work "../../trbnet/gbe_trb/protocols/trb_net16_gbe_response_constructor_KillPing.vhd" +#add_file -vhdl -lib work "../../trbnet/gbe_trb/protocols/trb_net16_gbe_response_constructor_KillPing.vhd" add_file -vhdl -lib work "../../trbnet/gbe_trb/protocols/trb_net16_gbe_response_constructor_Forward.vhd" add_file -vhdl -lib work "../../trbnet/media_interfaces/sync/main_rx_reset_RS.vhd" add_file -vhdl -lib work "../../trbnet/media_interfaces/sync/main_tx_reset_RS.vhd" @@ -279,6 +281,7 @@ add_file -vhdl -lib work "../../trbnet/gbe_trb_ecp5/media/ecp5/d0ch1/serdes_gbe. #add_file -vhdl -lib work "../../trbnet/gbe_trb_ecp5/media/ecp5/d1ch0/serdes_gbe.vhd" #add_file -vhdl -lib work "../../trbnet/gbe_trb_ecp5/media/ecp5/d1ch1/serdes_gbe.vhd" +add_file -vhdl -lib work "../../trbnet/gbe_trb/ipcores/ecp5/ram_dp_true_2kx9.vhd" #add_file -vhdl -lib work "../../trbnet/gbe_trb/ipcores/ecp5/fifo_8kx9.vhd" add_file -vhdl -lib work "../../trbnet/gbe_trb/ipcores/ecp5/fifo_4096x9.vhd" add_file -vhdl -lib work "../../trbnet/gbe_trb/ipcores/ecp5/fifo_512x32.vhd" diff --git a/gbe_standalone/trb5sc_gbe_template.vhd b/gbe_standalone/trb5sc_gbe_template.vhd index 75a0c60..8c7f303 100644 --- a/gbe_standalone/trb5sc_gbe_template.vhd +++ b/gbe_standalone/trb5sc_gbe_template.vhd @@ -62,7 +62,7 @@ entity trb5sc_template is LED_RJ_RED : out std_logic_vector(1 downto 0); LED_EXT_CLOCK : out std_logic; --Other Connectors - TEST : inout std_logic_vector(14 downto 1); + TEST : out std_logic_vector(14 downto 1); HDR_IO : inout std_logic_vector(15 downto 0) ); @@ -99,7 +99,10 @@ architecture arch of trb5sc_template is signal gsc_busy : std_logic; signal reboot_from_gbe : std_logic; + signal do_reboot_i : std_logic; signal reset_via_gbe : std_logic; + signal reset_via_gbe_long, reset_via_gbe_timer, last_reset_via_gbe_long, make_reset : std_logic; + attribute syn_keep of GSR_N : signal is true; attribute syn_preserve of GSR_N : signal is true; @@ -117,7 +120,7 @@ architecture arch of trb5sc_template is signal timer : TIMERS; signal additional_reg : std_logic_vector(31 downto 0); - alias led_off : std_logic is add_reg(0); + alias led_off : std_logic is additional_reg(0); signal spi_cs, spi_mosi, spi_miso, spi_clk : std_logic_vector(15 downto 0); signal sed_error_i : std_logic; @@ -134,6 +137,7 @@ begin port map( CLOCK_IN => CLK_200, GLOBAL_RESET_IN => '0', + RESET_FROM_NET => make_reset, RESET_OUT => reset_i, CLEAR_OUT => clear_i, GSR_OUT => GSR_N, @@ -144,6 +148,19 @@ begin ); + proc_make_reset : process begin + wait until rising_edge(clk_sys); + if(reset_via_gbe = '1') then + reset_via_gbe_long <= '1'; + reset_via_gbe_timer <= '1'; + end if; + if timer.tick_us = '1' then + reset_via_gbe_timer <= '0'; + reset_via_gbe_long <= reset_via_gbe_timer; + end if; + last_reset_via_gbe_long <= reset_via_gbe_long; + make_reset <= last_reset_via_gbe_long and not reset_via_gbe_long; + end process; --------------------------------------------------------------------------- -- GbE @@ -207,7 +224,7 @@ begin -- unique adresses MC_UNIQUE_ID_IN => timer.uid, MY_TRBNET_ADDRESS_IN => timer.network_address, - ISSUE_REBOOT_OUT => reboot_from_gbe, --BUG: needs to be connected + ISSUE_REBOOT_OUT => reboot_from_gbe, -- slow control by GbE GSC_CLK_IN => clk_sys, GSC_INIT_DATAREADY_OUT => gsc_init_dataready, @@ -349,7 +366,7 @@ begin FLASH_IN => FLASH_MISO, FLASH_OUT => FLASH_MOSI, PROGRAMN => PROGRAMN, - REBOOT_IN => common_ctrl_reg(15), + REBOOT_IN => do_reboot_i, --SPI SPI_CS_OUT => spi_cs, SPI_MOSI_OUT => spi_mosi, @@ -358,8 +375,6 @@ begin --Header HEADER_IO => HDR_IO(9 downto 0), ADDITIONAL_REG => additional_reg, - --LCD - LCD_DATA_IN => (others => '0'), --ADC ADC_CS => ADC_NCS, ADC_MOSI => ADC_MOSI, @@ -404,6 +419,8 @@ begin else spi_clk(3) when spi_cs(3) = '0' else '1'; + do_reboot_i <= common_ctrl_reg(15) or reboot_from_gbe; + --------------------------------------------------------------------------- -- I/Os @@ -411,8 +428,7 @@ begin --HDR_IO(15 downto 0) <= (others => '0'); --HDR_IO <= debug(15 downto 0); - TEST(13 downto 2) <= (others => '0'); - TEST(1) <= reset_via_gbe; -- to keep things in place + TEST(13 downto 1) <= (others => '0'); TEST(14) <= flash_ncs_i; FLASH_NCS <= flash_ncs_i; @@ -432,14 +448,14 @@ begin LED(3) <= not status(2); --'0'; -- AN_COMPLETE LED(2) <= not status(1); --'0'; -- LRR LED(1) <= not status(0); --'0'; -- LTR - LED_RJ_GREEN <= "00"; - LED_RJ_RED <= "11"; - LED_EXT_CLOCK <= IN_SELECT_EXT_CLOCK; + --LED_RJ_GREEN <= "00"; + --LED_RJ_RED <= "11"; + --LED_EXT_CLOCK <= IN_SELECT_EXT_CLOCK; LED_RJ_GREEN(1)<= not external_clock_lock or led_off; --on if external clock used - LED_RJ_GREEN(0)<= '0'; --on if SFP is used (next to SFP) + LED_RJ_GREEN(0)<= '0' or led_off; --on if SFP is used (next to SFP) LED_RJ_RED(1) <= external_clock_lock or led_off; --on if internal clock used LED_RJ_RED(0) <= '1'; --on if backplane is used (next to SFP) LED_EXT_CLOCK <= IN_SELECT_EXT_CLOCK or led_off; --on if trigger/clock from RJ45 is used