From: hadeshyp Date: Wed, 14 Feb 2007 16:10:45 +0000 (+0000) Subject: iomultiplexer seems to be stable, Ingo X-Git-Tag: oldGBE~761 X-Git-Url: https://jspc29.x-matter.uni-frankfurt.de/git/?a=commitdiff_plain;h=35ec6e0a384797a73210917c24e3ee4bdbd2ac26;p=trbnet.git iomultiplexer seems to be stable, Ingo --- diff --git a/testbench/in_io_multiplexer.txt b/testbench/in_io_multiplexer.txt index f634b7a..dcf7166 100644 --- a/testbench/in_io_multiplexer.txt +++ b/testbench/in_io_multiplexer.txt @@ -1,17 +1,32 @@ -0000:0 -0000:0 -0000:0 -1011:1 -0000:1 -0000:1 -0101:1 -0010:1 -0011:1 -1111:1 -1111:1 -1111:1 -1111:1 -1111:1 -1111:1 -1111:1 -0000:1 +0000:0:1 +0000:0:1 +0000:0:1 +0001:1:1 +0001:1:1 +0001:1:1 +0001:1:1 +0001:1:1 +0101:1:1 +1001:1:1 +1101:1:1 +0010:1:1 +1010:1:1 +1011:1:1 +0001:1:1 +0010:1:1 +0011:1:1 +1101:1:1 +1110:1:1 +1111:1:1 +0101:1:1 +0110:1:1 +0111:1:1 +0000:0:1 +0000:0:1 +0000:0:1 +0000:0:1 +0000:0:1 +0000:0:1 +0000:0:1 +0000:0:1 +0000:0:1 diff --git a/testbench/io_multiplexer_settings.sav b/testbench/io_multiplexer_settings.sav index a020895..78c6d2c 100644 --- a/testbench/io_multiplexer_settings.sav +++ b/testbench/io_multiplexer_settings.sav @@ -1,6 +1,6 @@ [size] 1272 936 [pos] -1 -1 -*-26.000000 90000000 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 +*-26.000000 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 @28 trb_net_io_multiplexer_testbench.UUT.clk trb_net_io_multiplexer_testbench.UUT.med_dataready_in @@ -8,5 +8,18 @@ trb_net_io_multiplexer_testbench.UUT.med_dataready_in trb_net_io_multiplexer_testbench.UUT.med_read_out #int_dataready_out[3:0] trb_net_io_multiplexer_testbench.UUT.int_dataready_out[3] trb_net_io_multiplexer_testbench.UUT.int_dataready_out[2] trb_net_io_multiplexer_testbench.UUT.int_dataready_out[1] trb_net_io_multiplexer_testbench.UUT.int_dataready_out[0] #int_data_out[7:0] trb_net_io_multiplexer_testbench.UUT.int_data_out[7] trb_net_io_multiplexer_testbench.UUT.int_data_out[6] trb_net_io_multiplexer_testbench.UUT.int_data_out[5] trb_net_io_multiplexer_testbench.UUT.int_data_out[4] trb_net_io_multiplexer_testbench.UUT.int_data_out[3] trb_net_io_multiplexer_testbench.UUT.int_data_out[2] trb_net_io_multiplexer_testbench.UUT.int_data_out[1] trb_net_io_multiplexer_testbench.UUT.int_data_out[0] -@22 #int_read_in[3:0] trb_net_io_multiplexer_testbench.UUT.int_read_in[3] trb_net_io_multiplexer_testbench.UUT.int_read_in[2] trb_net_io_multiplexer_testbench.UUT.int_read_in[1] trb_net_io_multiplexer_testbench.UUT.int_read_in[0] +@200 +- +@28 +#input_in[3:0] trb_net_io_multiplexer_testbench.UUT.ARBITER.input_in[3] trb_net_io_multiplexer_testbench.UUT.ARBITER.input_in[2] trb_net_io_multiplexer_testbench.UUT.ARBITER.input_in[1] trb_net_io_multiplexer_testbench.UUT.ARBITER.input_in[0] +trb_net_io_multiplexer_testbench.UUT.ARBITER.enable +#result_out[3:0] trb_net_io_multiplexer_testbench.UUT.ARBITER.result_out[3] trb_net_io_multiplexer_testbench.UUT.ARBITER.result_out[2] trb_net_io_multiplexer_testbench.UUT.ARBITER.result_out[1] trb_net_io_multiplexer_testbench.UUT.ARBITER.result_out[0] +@200 +- +@28 +trb_net_io_multiplexer_testbench.UUT.med_dataready_out +@29 +#med_data_out[3:0] trb_net_io_multiplexer_testbench.UUT.med_data_out[3] trb_net_io_multiplexer_testbench.UUT.med_data_out[2] trb_net_io_multiplexer_testbench.UUT.med_data_out[1] trb_net_io_multiplexer_testbench.UUT.med_data_out[0] +@28 +trb_net_io_multiplexer_testbench.UUT.med_read_in diff --git a/testbench/io_multiplexer_testsim.tcl b/testbench/io_multiplexer_testsim.tcl index d607c67..4940888 100644 --- a/testbench/io_multiplexer_testsim.tcl +++ b/testbench/io_multiplexer_testsim.tcl @@ -1,5 +1,7 @@ vcd dumpfile vcdfile.vcd vcd dumpvars -m /UUT/ vcd dumpvars -m /UUT/DEFDR/ +vcd dumpvars -m /UUT/ARBITER/ +vcd dumpvars -m /UUT/G2/ run 1000 ns quit \ No newline at end of file diff --git a/testbench/trb_net_io_multiplexer_testbench.vhd b/testbench/trb_net_io_multiplexer_testbench.vhd index d1d6d3e..1a4f09e 100644 --- a/testbench/trb_net_io_multiplexer_testbench.vhd +++ b/testbench/trb_net_io_multiplexer_testbench.vhd @@ -59,14 +59,17 @@ architecture trb_net_io_multiplexer_testbench_arch of trb_net_io_multiplexer_tes -- Status and control port + CTRL: in STD_LOGIC_VECTOR (31 downto 0); STAT: out STD_LOGIC_VECTOR (31 downto 0) ); end component; - signal med_dataready_in : std_logic := '0'; + signal med_dataready_in, med_read_in,med_read_out : std_logic := '0'; signal med_data_in: STD_LOGIC_VECTOR(3 downto 0) := "0000"; - + signal int_read : STD_LOGIC_VECTOR(3 downto 0) := "0000"; + signal int_dataready : STD_LOGIC_VECTOR(3 downto 0) := "0000"; + signal int_data : STD_LOGIC_VECTOR(7 downto 0) := "00000000"; begin UUT: trb_net_io_multiplexer @@ -81,16 +84,20 @@ begin MED_DATAREADY_IN => med_dataready_in, MED_DATA_IN => med_data_in, - - MED_READ_IN => '1', + MED_READ_IN => med_read_in, + MED_READ_OUT => med_read_out, -- Internal direction port -- INT_READ_IN => (others => '0'), - INT_READ_IN => (others => '1'), - - INT_DATAREADY_IN => (others => '0'), - INT_DATA_IN => (others => '0') - + INT_READ_IN => int_read, + INT_READ_OUT => int_read, + INT_DATAREADY_IN => int_dataready, + INT_DATAREADY_OUT => int_dataready, + INT_DATA_IN => int_data, + INT_DATA_OUT => int_data, + + CTRL => ctrl + ); clk <= not clk after 10ns; @@ -101,11 +108,11 @@ begin reset <= '1'; wait for 30ns; reset <= '0'; --- ctrl(8 downto 0) <= "100000000"; --only fixed + ctrl(8 downto 0) <= "100000000"; --only fixed -- ctrl(8 downto 0) <= "111111111"; --only rr -- ctrl(8 downto 0) <= "101010101"; --mixed wait for 20ns; --- ctrl(8 downto 0) <= "000000000"; + ctrl(8 downto 0) <= "000000000"; wait; end process DO_RESET; @@ -117,7 +124,7 @@ begin variable varx1 : std_logic_vector(2 downto 0); variable varx2, varx3 : std_logic_vector(3 downto 0); begin - if falling_edge(CLK) then + if falling_edge(CLK) and med_read_out = '1' then if (not endfile(protokoll)) then readline(protokoll,myoutline); @@ -127,6 +134,10 @@ begin read(myoutline,var1); med_dataready_in <= var1; + read(myoutline,leer); + + read(myoutline,var2); + med_read_in <= var2; end if; end if; @@ -139,5 +150,5 @@ end trb_net_io_multiplexer_testbench_arch; -- trb_net_io_multiplexer_testbench -tclbatch io_multiplexer_testsim.tcl --- +-- gtkwave vcdfile.vcd io_multiplexer_settings.sav diff --git a/trb_net_io_multiplexer.vhd b/trb_net_io_multiplexer.vhd index 6558b72..10ee1e7 100644 --- a/trb_net_io_multiplexer.vhd +++ b/trb_net_io_multiplexer.vhd @@ -34,13 +34,12 @@ entity trb_net_io_multiplexer is INT_DATA_OUT: out STD_LOGIC_VECTOR ((BUS_WIDTH-MULT_WIDTH)*(2**MULT_WIDTH)-1 downto 0); INT_READ_IN: in STD_LOGIC_VECTOR (2**MULT_WIDTH-1 downto 0); - INT_DATAREADY_IN: in STD_LOGIC_VECTOR (2**MULT_WIDTH downto 0); + INT_DATAREADY_IN: in STD_LOGIC_VECTOR (2**MULT_WIDTH-1 downto 0); INT_DATA_IN: in STD_LOGIC_VECTOR ((BUS_WIDTH-MULT_WIDTH)*(2**MULT_WIDTH)-1 downto 0); INT_READ_OUT: out STD_LOGIC_VECTOR (2**MULT_WIDTH-1 downto 0); - - -- Status and control port + CTRL: in STD_LOGIC_VECTOR (31 downto 0); STAT: out STD_LOGIC_VECTOR (31 downto 0) ); END trb_net_io_multiplexer; @@ -85,18 +84,36 @@ architecture trb_net_io_multiplexer_arch of trb_net_io_multiplexer is CTRL_BUFFER: in STD_LOGIC_VECTOR (31 downto 0) ); END component; + + component trb_net_priority_arbiter is + + generic (WIDTH : integer := 16); + + port( + -- Misc + CLK : in std_logic; + RESET : in std_logic; + CLK_EN : in std_logic; + + INPUT_IN : in STD_LOGIC_VECTOR (WIDTH-1 downto 0); + RESULT_OUT: out STD_LOGIC_VECTOR (WIDTH-1 downto 0); + + ENABLE : in std_logic; + CTRL: in STD_LOGIC_VECTOR (31 downto 0) + ); + END component; signal demux_next_READ, current_demux_READ : STD_LOGIC_VECTOR ((2**MULT_WIDTH)-1 downto 0); signal next_demux_dr, next_demux_dr_tmp: STD_LOGIC_VECTOR ((2**MULT_WIDTH)-1 downto 0); - signal demux_read: STD_LOGIC; -- buffer is read out and killed +-- signal demux_read: STD_LOGIC; -- buffer is read out and killed signal current_MED_READ_OUT, next_MED_READ_OUT: STD_LOGIC; +-- signal sbuf_stat: STD_LOGIC_VECTOR (2*(2**MULT_WIDTH)-1 downto 0); + + signal tmp_INT_READ_OUT: STD_LOGIC_VECTOR ((2**MULT_WIDTH)-1 downto 0); + signal mux_read, mux_enable, mux_next_READ: STD_LOGIC; + signal current_mux_buffer: STD_LOGIC_VECTOR (BUS_WIDTH-1 downto 0); - signal current_mux_buffer, next_mux_buffer: STD_LOGIC_VECTOR (BUS_WIDTH-1 downto 0); - signal current_mux_empty, next_mux_empty: STD_LOGIC; - signal current_mux_DR, next_mux_DR: STD_LOGIC; - signal current_mux_read, next_mux_read: STD_LOGIC_VECTOR ((2**MULT_WIDTH)-1 downto 0); - signal mux_read: STD_LOGIC; -- buffer is read out and killed begin @@ -107,7 +124,7 @@ architecture trb_net_io_multiplexer_arch of trb_net_io_multiplexer is -- the simpler part is the demux G1: for i in 0 to 2**MULT_WIDTH-1 generate - G2: trb_net_sbuf + DEMUX_SBUF: trb_net_sbuf generic map (DATA_WIDTH => BUS_WIDTH-MULT_WIDTH) port map ( CLK => CLK, @@ -120,7 +137,6 @@ architecture trb_net_io_multiplexer_arch of trb_net_io_multiplexer is SYN_DATAREADY_OUT => INT_DATAREADY_OUT(i), SYN_DATA_OUT => INT_DATA_OUT ((BUS_WIDTH-MULT_WIDTH)*(i+1)-1 downto (BUS_WIDTH-MULT_WIDTH)*(i)), SYN_READ_IN => INT_READ_IN(i), --- STAT_BUFFER => CTRL_BUFFER => (others => '0') ); end generate; @@ -133,7 +149,7 @@ architecture trb_net_io_multiplexer_arch of trb_net_io_multiplexer is next_demux_dr <= (others => '0'); current_demux_READ <= (others => '0'); -- generate the READ_OUT - next_MED_READ_OUT <= or_all(demux_next_READ or INT_READ_IN); + next_MED_READ_OUT <= and_all(demux_next_READ or INT_READ_IN); -- (follow instruction on sbuf) current_demux_READ <= (others => '0'); @@ -167,13 +183,54 @@ architecture trb_net_io_multiplexer_arch of trb_net_io_multiplexer is end process; +------------------------------------------------------------------------------- +-- MUX part with arbitration scheme +------------------------------------------------------------------------------- +ARBITER: trb_net_priority_arbiter + generic map (WIDTH => 2**MULT_WIDTH) + port map ( + CLK => CLK, + RESET => RESET, + CLK_EN => CLK_EN, + INPUT_IN => INT_DATAREADY_IN, + RESULT_OUT => tmp_INT_READ_OUT, + ENABLE => mux_enable, + CTRL => CTRL + ); --- G3: for i in 2**MULT_WIDTH-1 downto 0 generate +INT_READ_OUT <= tmp_INT_READ_OUT; + + MUX_SBUF: trb_net_sbuf + generic map (DATA_WIDTH => BUS_WIDTH) + port map ( + CLK => CLK, + RESET => RESET, + CLK_EN => CLK_EN, + COMB_DATAREADY_IN => mux_read, + COMB_next_READ_OUT => mux_next_READ, + COMB_READ_IN => '1', + COMB_DATA_IN => current_mux_buffer, + SYN_DATAREADY_OUT => MED_DATAREADY_OUT, + SYN_DATA_OUT => MED_DATA_OUT, + SYN_READ_IN => MED_READ_IN, +-- STAT_BUFFER => + CTRL_BUFFER => (others => '0') + ); + +process (tmp_INT_READ_OUT, INT_DATA_IN) + begin + current_mux_buffer <= (others => '0'); + for i in 0 to 2**MULT_WIDTH-1 loop + if tmp_INT_READ_OUT(i) = '1' then + current_mux_buffer(BUS_WIDTH-MULT_WIDTH-1 downto 0) + <= INT_DATA_IN((BUS_WIDTH-MULT_WIDTH)*(i+1)-1 downto (BUS_WIDTH-MULT_WIDTH)*(i)); + current_mux_buffer(BUS_WIDTH-1 downto BUS_WIDTH-MULT_WIDTH) <= conv_std_logic_vector(i, MULT_WIDTH); + end if; + end loop; + end process; + + mux_enable <= (MED_READ_IN or mux_next_READ); + mux_read <= or_all(tmp_INT_READ_OUT and INT_DATAREADY_IN); --- INT_DATA_OUT((BUS_WIDTH-MULT_WIDTH)*((i+1))-1 downto (BUS_WIDTH-MULT_WIDTH)*(i)) --- <= current_demux_buffer(BUS_WIDTH-MULT_WIDTH-1 downto 0) ; --- end generate; - - end trb_net_io_multiplexer_arch; diff --git a/trb_net_priority_arbiter.vhd b/trb_net_priority_arbiter.vhd index 6a0fb0a..e867e77 100755 --- a/trb_net_priority_arbiter.vhd +++ b/trb_net_priority_arbiter.vhd @@ -18,6 +18,7 @@ entity trb_net_priority_arbiter is INPUT_IN : in STD_LOGIC_VECTOR (WIDTH-1 downto 0); RESULT_OUT: out STD_LOGIC_VECTOR (WIDTH-1 downto 0); + ENABLE : in std_logic; CTRL: in STD_LOGIC_VECTOR (31 downto 0) ); END trb_net_priority_arbiter; @@ -94,9 +95,11 @@ architecture trb_net_priority_arbiter_arch of trb_net_priority_arbiter is comb_rr : process(current_p1_pattern, current_p2_pattern,use_rr, sampled_rr_pattern1, sampled_rr_pattern2, proposed_rr_pattern1, proposed_rr_pattern2, leading_rr_pattern1, leading_rr_pattern2, - current_rr_mask, CTRL, next_fixed_pattern, next_rr_pattern) + current_rr_mask, CTRL, next_fixed_pattern, next_rr_pattern, + ENABLE) begin - next_rr_pattern <= (others => '0'); + next_rr_pattern(0) <= '1'; --stay tuned on highst Pr. + next_rr_pattern(WIDTH -1 downto 1) <= (others => '0'); next_p1_pattern <= current_p1_pattern; next_p2_pattern <= current_p2_pattern; next_rr_mask <= current_rr_mask; @@ -129,9 +132,14 @@ architecture trb_net_priority_arbiter_arch of trb_net_priority_arbiter is end if; -- finally make the pattern - if current_rr_mask(0) = '0' then - next_final_pattern <= next_fixed_pattern; - else + if current_rr_mask(0) = '0' and ENABLE = '1' then + if or_all(next_fixed_pattern) = '1' then + next_final_pattern <= next_fixed_pattern; + else + next_final_pattern(0) <= '1'; --stay tuned on highst Pr. + next_final_pattern(WIDTH -1 downto 1) <= (others => '0'); + end if; + elsif ENABLE = '1' then next_final_pattern <= next_rr_pattern; end if; diff --git a/trb_net_sbuf.vhd b/trb_net_sbuf.vhd index e009b99..a6a808f 100644 --- a/trb_net_sbuf.vhd +++ b/trb_net_sbuf.vhd @@ -64,13 +64,14 @@ architecture trb_net_sbuf_arch of trb_net_sbuf is STAT_BUFFER(31 downto 1) <= (others => '0'); COMB: process (current_buffer_state, COMB_DATAREADY_IN, COMB_READ_IN, - SYN_READ_IN, COMB_DATA_IN, current_b1_buffer, current_b2_buffer) + SYN_READ_IN, COMB_DATA_IN, current_b1_buffer, current_b2_buffer, + current_SYN_DATAREADY_OUT) begin -- process COMB next_buffer_state <= current_buffer_state; next_next_READ_OUT <= '1'; next_b2_buffer <= current_b2_buffer; next_b1_buffer <= current_b1_buffer; - next_SYN_DATAREADY_OUT <= '0'; + next_SYN_DATAREADY_OUT <= current_SYN_DATAREADY_OUT; next_got_overflow <= current_got_overflow; if current_buffer_state = BUFFER_EMPTY then if COMB_DATAREADY_IN = '1' and COMB_READ_IN = '1' then @@ -98,6 +99,7 @@ begin -- process COMB next_SYN_DATAREADY_OUT <= '1'; elsif SYN_READ_IN = '1' then next_buffer_state <= BUFFER_EMPTY; + next_SYN_DATAREADY_OUT <= '0'; end if; elsif current_buffer_state = BUFFER_B1_FULL then if COMB_DATAREADY_IN = '1' and COMB_READ_IN = '1' and SYN_READ_IN = '1' then