From: Andreas Neiser <neiser@kph.uni-mainz.de>
Date: Thu, 28 May 2015 12:16:55 +0000 (+0200)
Subject: Another try to properly disable the problematic ADC
X-Git-Url: https://jspc29.x-matter.uni-frankfurt.de/git/?a=commitdiff_plain;h=37080470567f78d9784fdb3614042e0ddf830162;p=trb3.git

Another try to properly disable the problematic ADC
---

diff --git a/ADC/source/adc_ad9219.vhd b/ADC/source/adc_ad9219.vhd
index a64157e..4bd186c 100644
--- a/ADC/source/adc_ad9219.vhd
+++ b/ADC/source/adc_ad9219.vhd
@@ -186,32 +186,35 @@ begin
       );
   end generate;
   
-  -- skip ADC10, connected to problematic input for Diamond >2.1
-  gen_4 : if NUM_DEVICES = 5 and ADC_CHANNELS = 44 generate
-    THE_4 : entity work.dqsinput_4x5
+  -- skip ADC10 connected to ADC_DATA(14 downto 10),
+  -- due to disable input for Diamond version >2.1
+  gen_fake4 : if NUM_DEVICES = 5 and ADC_CHANNELS = 44 generate
+    THE_5 : entity work.dqsinput_5x5
       port map(
         clk_0        => ADC_DCO(1),
         clk_1        => ADC_DCO(2),
-        clk_2        => ADC_DCO(3),
+        clk_2        => '0',
         clk_3        => ADC_DCO(4),
+        clk_4        => ADC_DCO(5),
         clkdiv_reset => RESTART_IN,
         eclk         => clk_adcfast_i,
         reset_0      => restart_i,
         reset_1      => restart_i,
-        reset_2      => restart_i,
+        reset_2      => '0',
         reset_3      => restart_i,
+        reset_4      => restart_i,
         sclk         => clk_data,
         datain_0     => ADC_DATA(4 downto 0),
         datain_1     => ADC_DATA(9 downto 5),
-        -- ADC_DATA(14 downto 10) corresponds to ADC10
-        datain_2     => ADC_DATA(19 downto 15),
-        datain_3     => ADC_DATA(24 downto 20),
+        datain_2     => (others => '0'),
+        datain_3     => ADC_DATA(19 downto 15),
+        datain_4     => ADC_DATA(24 downto 20),
         q_0          => q(0),
         q_1          => q(1),
-        -- skip here as well
-        q_2          => q(3),
-        q_3          => q(4)
-    );
+        q_2          => open,
+        q_3          => q(3),
+        q_4          => q(4)
+      );
     q(2) <= (others => '0');
   end generate;