From: Andreas Neiser <neiser@kph.uni-mainz.de>
Date: Tue, 7 May 2013 17:43:04 +0000 (+0200)
Subject: Adding the ETM to the CTS
X-Git-Url: https://jspc29.x-matter.uni-frankfurt.de/git/?a=commitdiff_plain;h=3ab24f7daac12fb9c6909ab186cd10c8287dd1c3;p=trb3.git

Adding the ETM to the CTS
---

diff --git a/cts/source/cts_pkg.vhd b/cts/source/cts_pkg.vhd
index b209203..f7149c1 100755
--- a/cts/source/cts_pkg.vhd
+++ b/cts/source/cts_pkg.vhd
@@ -125,6 +125,7 @@ package cts_pkg is
       --Registers / Debug    
       CONTROL_REG_IN : in  std_logic_vector(31 downto 0);
       STATUS_REG_OUT : out std_logic_vector(31 downto 0);
+      HEADER_REG_OUT : out std_logic_vector(1 downto 0);
       DEBUG          : out std_logic_vector(31 downto 0)    
       );
    end component;   
@@ -145,6 +146,7 @@ package cts_pkg is
 			 FINISHED_OUT			 : out std_logic;
 			 CONTROL_REG_IN		 : in	 std_logic_vector(31 downto 0);
 			 STATUS_REG_OUT		 : out std_logic_vector(31 downto 0) := (others => '0');
+			 HEADER_REG_OUT    : out std_logic_vector(1 downto 0);
 			 DEBUG						 : out std_logic_vector(31 downto 0));
 	 end component mainz_a2_recv;
 	 
diff --git a/cts/source/mainz_a2_recv.vhd b/cts/source/mainz_a2_recv.vhd
index 5eb5a7b..1786303 100644
--- a/cts/source/mainz_a2_recv.vhd
+++ b/cts/source/mainz_a2_recv.vhd
@@ -33,6 +33,7 @@ entity mainz_a2_recv is
 																				--Registers / Debug		 
 		CONTROL_REG_IN : in	 std_logic_vector(31 downto 0);
 		STATUS_REG_OUT : out std_logic_vector(31 downto 0) := (others => '0');
+		HEADER_REG_OUT    : out std_logic_vector(1 downto 0);
 		DEBUG					 : out std_logic_vector(31 downto 0)
 		);
 end entity;
@@ -86,9 +87,8 @@ architecture arch1 of mainz_a2_recv is
 	signal config_rdo_disable_i : std_logic;
 
 begin
-	timer_tick_1us <= TIMER_TICK_1US_IN;
-
-	reg_SERIAL_IN <= SERIAL_IN when rising_edge(CLK);
+	-- we tell the CTS that we send four words of over DATA_OUT
+	HEADER_REG_OUT <= b"10"; 
 
 																				--PROC_FIRST_BITS : process
 																				--begin
diff --git a/cts/source/mbs_vulom_recv.vhd b/cts/source/mbs_vulom_recv.vhd
index a5b1863..bcc1325 100644
--- a/cts/source/mbs_vulom_recv.vhd
+++ b/cts/source/mbs_vulom_recv.vhd
@@ -30,6 +30,7 @@ entity mbs_vulom_recv is
     --Registers / Debug    
     CONTROL_REG_IN : in  std_logic_vector(31 downto 0);
     STATUS_REG_OUT : out std_logic_vector(31 downto 0) := (others => '0');
+    HEADER_REG_OUT : out std_logic_vector(1 downto 0);
     DEBUG          : out std_logic_vector(31 downto 0)    
     );
 end entity;
@@ -80,6 +81,8 @@ signal config_rdo_disable_i : std_logic;
 
 begin
 
+-- we tell the CTS that we send one word of over DATA_OUT
+HEADER_REG_OUT <= b"01"; 
 
 reg_MBS_IN <= MBS_IN when rising_edge(CLK_200);
 
@@ -192,4 +195,4 @@ config_rdo_disable_i <= CONTROL_REG_IN(0);
 STATUS_REG_OUT <= error_reg & '0' & std_logic_vector(to_unsigned(bitcnt,6)) & number_reg;
 DEBUG <= x"00000000"; -- & done & '0' & shift_reg(13 downto 0);
 
-end architecture;
\ No newline at end of file
+end architecture;
diff --git a/cts/trb3_central.vhd b/cts/trb3_central.vhd
index 0f11f5e..88e042c 100644
--- a/cts/trb3_central.vhd
+++ b/cts/trb3_central.vhd
@@ -306,6 +306,7 @@ architecture trb3_central_arch of trb3_central is
   signal cts_ext_status              : std_logic_vector(31 downto 0) := (others => '0');
   signal cts_ext_control             : std_logic_vector(31 downto 0);
   signal cts_ext_debug               : std_logic_vector(31 downto 0);
+  signal cts_ext_header 						 : std_logic_vector(1 downto 0);
 
   signal cts_rdo_additional_data            : std_logic_vector(31+INCLUDE_TDC*32 downto 0);
   signal cts_rdo_additional_write           : std_logic_vector(0+INCLUDE_TDC downto 0) := (others => '0');
@@ -430,6 +431,7 @@ begin
 
       CONTROL_REG_IN => cts_ext_control,
       STATUS_REG_OUT => cts_ext_status,
+      HEADER_REG_OUT => cts_ext_header,
       
       DEBUG => cts_ext_debug
    );
@@ -454,6 +456,7 @@ begin
 
 				CONTROL_REG_IN => cts_ext_control,
 				STATUS_REG_OUT => cts_ext_status,
+				HEADER_REG_OUT => cts_ext_header,
 				
 				DEBUG => cts_ext_debug
 				);
@@ -482,7 +485,8 @@ begin
       
       EXT_TRIGGER_IN => cts_ext_trigger,
       EXT_STATUS_IN  => cts_ext_status,
-      EXT_CONTROL_OUT => cts_ext_control, 
+      EXT_CONTROL_OUT => cts_ext_control,
+      EXT_HEADER_BITS_IN => cts_ext_header,
       
       CTS_TRG_SEND_OUT => cts_trg_send,
       CTS_TRG_TYPE_OUT => cts_trg_type,