From: Jan Michel <j.michel@gsi.de>
Date: Tue, 16 Jun 2020 09:33:05 +0000 (+0200)
Subject: add FPGA SIZE
X-Git-Url: https://jspc29.x-matter.uni-frankfurt.de/git/?a=commitdiff_plain;h=3e20360be5f4f50a5d3a6f5492471667e5d47b54;p=trb5sc.git

add FPGA SIZE
---

diff --git a/template/config.vhd b/template/config.vhd
index 9d4a422..4757bc0 100644
--- a/template/config.vhd
+++ b/template/config.vhd
@@ -12,7 +12,7 @@ package config is
 
 
 --set to 0 for backplane serdes, set to 1 for SFP serdes
-    constant SERDES_NUM             : integer := 1;
+    constant SERDES_NUM             : integer := 0;
 
 --TDC settings
   constant FPGA_TYPE               : integer  := 5;  --3: ECP3, 5: ECP5
@@ -58,6 +58,8 @@ package config is
     constant TRIG_GEN_INPUT_NUM     : integer  := 32;
     constant TRIG_GEN_OUTPUT_NUM    : integer  := 4;
     constant MONITOR_INPUT_NUM      : integer  := 32;        
+
+    constant FPGA_SIZE : string := "85KUM";
     
 ------------------------------------------------------------------------------
 --End of design configuration