From: Cahit Date: Mon, 4 May 2015 05:53:30 +0000 (+0200) Subject: minor changes in the ADA project file X-Git-Url: https://jspc29.x-matter.uni-frankfurt.de/git/?a=commitdiff_plain;h=431716ef06a5fbac5c19602bfbe7b6041e9847d9;p=trb3.git minor changes in the ADA project file --- diff --git a/ADA_Addon/config.vhd b/ADA_Addon/config.vhd index 5913c3e..07b061a 100644 --- a/ADA_Addon/config.vhd +++ b/ADA_Addon/config.vhd @@ -26,7 +26,7 @@ package config is --Include SPI on AddOn connector constant INCLUDE_SPI : integer := c_YES; - constant SPI_FOR_PADI : integer := c_YES; + constant SPI_FOR_PADI : integer := c_YES; -- YES: PADI SPI NO: Normal SPI --Add logic to generate configurable trigger signal from input signals. constant INCLUDE_TRIGGER_LOGIC : integer := c_NO; diff --git a/ADA_Addon/tdc_release b/ADA_Addon/tdc_release new file mode 120000 index 0000000..b10de14 --- /dev/null +++ b/ADA_Addon/tdc_release @@ -0,0 +1 @@ +../../tdc/releases/tdc_v2.1.2 \ No newline at end of file diff --git a/ADA_Addon/trb3_periph_ADA.prj b/ADA_Addon/trb3_periph_ADA.prj index 9013beb..2cec845 100644 --- a/ADA_Addon/trb3_periph_ADA.prj +++ b/ADA_Addon/trb3_periph_ADA.prj @@ -165,4 +165,4 @@ add_file -vhdl -lib work "../../tdc/base/cores/ecp3/FIFO/FIFO_36x128_OutReg.vhd" add_file -vhdl -lib work "../../tdc/base/cores/ecp3/FIFO/FIFO_36x64_OutReg.vhd" add_file -vhdl -lib work "../../tdc/base/cores/ecp3/FIFO/FIFO_36x32_OutReg.vhd" add_file -vhdl -lib work "trb3_periph_ADA.vhd" -add_file -vhdl -lib work "../../tdc/base/cores/ecp3/PLL/pll_in20_out100.vhd" +