From: Tobias Weber <toweber86@gmail.com>
Date: Sun, 3 Jun 2018 08:50:12 +0000 (+0200)
Subject: bypass logic
X-Git-Url: https://jspc29.x-matter.uni-frankfurt.de/git/?a=commitdiff_plain;h=46900c5bc5ca3aca36f26a9ec7a332d5a75d8e6c;p=trb3.git

bypass logic
---

diff --git a/mupix/Mupix8/sources/Gray2Binary.vhd b/mupix/Mupix8/sources/Gray2Binary.vhd
index fb94162..a16f3de 100644
--- a/mupix/Mupix8/sources/Gray2Binary.vhd
+++ b/mupix/Mupix8/sources/Gray2Binary.vhd
@@ -13,6 +13,7 @@ entity gray_to_binary is
   port (
     clk     : in  std_logic;            -- clk input
     reset   : in  std_logic;            -- reset input
+    bypass  : in  std_logic;            -- bypass logic
     gray_in : in  std_logic_vector (NBITS - 1 downto 0);  -- gray counter input
     bin_out : out std_logic_vector (NBITS - 1 downto 0)  -- binary counter output
     );
@@ -33,7 +34,11 @@ begin
         for i in NBITS - 2 downto 0 loop
           decoding(i) := gray_in(i) xor decoding(i + 1);
         end loop;
-        bin_out <= decoding;
+        if bypass = '1' then
+            bin_out <= gray_in;
+        else
+            bin_out <= decoding;
+        end if;
       end if;
     end if;
   end process;