From: hadeshyp <hadeshyp>
Date: Thu, 17 Sep 2009 12:38:54 +0000 (+0000)
Subject: *** empty log message ***
X-Git-Url: https://jspc29.x-matter.uni-frankfurt.de/git/?a=commitdiff_plain;h=47bfc9881a61d861355d985e5d419a81c898238a;p=mdcoep.git

*** empty log message ***
---

diff --git a/mdc_oepb.vhd b/mdc_oepb.vhd
index 85339af..2d32bb6 100644
--- a/mdc_oepb.vhd
+++ b/mdc_oepb.vhd
@@ -95,7 +95,7 @@ architecture mdc_oepb_arch of mdc_oepb is
 
   signal REGIO_COMMON_STAT_REG_IN : std_logic_vector(std_COMSTATREG*32-1 downto 0);
   signal REGIO_COMMON_CTRL_REG_OUT : std_logic_vector(std_COMCTRLREG*32-1 downto 0);
-  signal REGIO_REGISTERS_IN : std_logic_vector(32*2**(3)-1 downto 0);
+  signal REGIO_REGISTERS_IN : std_logic_vector(32*2**(4)-1 downto 0);
   signal REGIO_REGISTERS_OUT : std_logic_vector(32*2**(3)-1 downto 0);
   signal REGIO_ADDR_OUT : std_logic_vector(15 downto 0);
   signal REGIO_READ_ENABLE_OUT : std_logic;
@@ -175,6 +175,9 @@ architecture mdc_oepb_arch of mdc_oepb is
   signal direction_data_line_out_i : std_logic_vector(3 downto 0);
   signal motherboard_type_in_i : std_logic_vector(3 downto 0);
   signal pulse_begin_run_trigger_i : std_logic;
+  signal timing_trigger_received : std_logic;
+  signal timing_trigger_in       : std_logic;
+  signal pulse_timing_trigger    : std_logic;
 
   signal data_type_select_in_i : std_logic_vector(15 downto 0);
 
@@ -335,7 +338,7 @@ begin
 ---------------------------------------------------------------------
   API: trb_net16_endpoint_hades_full
     generic map(
-      REGIO_NUM_STAT_REGS      => 3,--4,    --16 stat reg
+      REGIO_NUM_STAT_REGS      => 4,--4,    --16 stat reg
       REGIO_NUM_CTRL_REGS      => 3,--3,    --8 cotrol reg
       --standard values for output registers
       REGIO_INIT_CTRL_REGS     => (others => '0'),
@@ -407,7 +410,7 @@ begin
       REGIO_ONEWIRE_MONITOR_IN  => '0',
       REGIO_ONEWIRE_MONITOR_OUT => open,
 
-      TRIGGER_MONITOR_IN        => trigger_monitor,
+      TRIGGER_MONITOR_IN        => timing_trigger_received,
       GLOBAL_TIME_OUT           => global_time,
       LOCAL_TIME_OUT            => local_time,
       TIME_SINCE_LAST_TRG_OUT   => time_since_last_trg,
@@ -423,7 +426,7 @@ begin
       STAT_ADDR_DEBUG           => open
       );
 
-  trigger_monitor <= '0';
+
 
 ---------------------------------------------------------------------
 -- SlowControl Handler
@@ -724,8 +727,8 @@ THE_REGIO_BUS_HANDLER : trb_net16_regio_bus_handler
 ---------------------------------------------------------------------
 -- Transport trigger to FEE and FEE definition
 ---------------------------------------------------------------------
--- 0xc0 0x0011 -> send begrun trigger to 1 short
--- 0xc0 0x0021 -> send begrun trigger to 1 long
+-- 0xc0 0x0010 -> select short
+-- 0xc0 0x0020 -> select long
 -- 0xc0 0x0C10 -> x"C" set calibration trigger, x"0" normal
 -- 0xc0 0x0000 -> select verbose mode data
 -- 0xc0 0x1000 -> select compact mode data
@@ -737,11 +740,29 @@ THE_REGIO_BUS_HANDLER : trb_net16_regio_bus_handler
 -- 0xc0 0x00000000  -> x"0" internal generated cms
 
 
+
 -------------------------------------------------------------------------------
 -- Select Internal or external common stop
 -------------------------------------------------------------------------------
+
 CMS <= COM_STOP_P when (cms_select_in_i = x"1") else a_cms_i;
 
+timing_trigger_received <= pulse_timing_trigger  when (cms_select_in_i = x"1") else pulse_pseudo_timing_trigger;
+
+
+  THE_CMS_SYNC : signal_sync
+    generic map(
+      DEPTH => 2,
+      WIDTH => 1
+      )
+    port map(
+      RESET    => reset_internal,
+      D_IN(0)  => COM_STOP_P,
+      CLK0     => CLK_100,
+      CLK1     => CLK_100,
+      D_OUT(0) => timing_trigger_in
+      );
+
 
 -- 0xc0 0xABCD2000 -> x"ABCD" test data number
 
@@ -757,7 +778,12 @@ CMS <= COM_STOP_P when (cms_select_in_i = x"1") else a_cms_i;
     end process;
 
 
-
+  PULSE_TIMING_TRIGGER : edge_to_pulse
+      port map (
+        CLOCK         => CLK_100,
+        ENABLE_CLK_IN => '1',
+        SIGNAL_IN     => timing_trigger_in,
+        PULSE_OUT     => pulse_timing_trigger);
 
   PULSE_TRIGGER : edge_to_pulse
       port map (
@@ -779,7 +805,7 @@ CMS <= COM_STOP_P when (cms_select_in_i = x"1") else a_cms_i;
        port map (
          CLOCK         => CLK_100,
          ENABLE_CLK_IN => '1',
-         SIGNAL_IN     => REGIO_REGISTERS_OUT(0),
+         SIGNAL_IN     => REGIO_COMMON_CTRL_REG_OUT(24),
          PULSE_OUT     => pulse_begin_run_trigger_i);
 
   test_pseudo_signal_i <= (pulse_pseudo_timing_trigger and LVL1_TRG_RELEASE_IN)
@@ -791,7 +817,7 @@ CMS <= COM_STOP_P when (cms_select_in_i = x"1") else a_cms_i;
         RESET              => reset_internal,
         INTERNAL_RESET_IN  => pulse_begin_run_trigger_i,
         A_RDO_IN           => token_to_mux_out_i,
-        TRIGGER_IN         => pulse_pseudo_timing_trigger,
+        TRIGGER_IN         => timing_trigger_received, --pulse_pseudo_timing_trigger,
         TRIGGER_TYPE_IN    => LVL1_TRG_TYPE_OUT,
         INIT_ALL_BUSES_OUT => init_all_buses_i,
         ROC1_WRITTEN_IN    => roc1_written_i,