From: Jan Michel Date: Wed, 12 Apr 2023 12:06:29 +0000 (+0200) Subject: update beamabort project files X-Git-Url: https://jspc29.x-matter.uni-frankfurt.de/git/?a=commitdiff_plain;h=48ee54411b4ab827461a0f138d36dd137a761222;p=trb3sc.git update beamabort project files --- diff --git a/shutdownlogic/config.vhd b/shutdownlogic/config.vhd index 246f612..1725ffb 100644 --- a/shutdownlogic/config.vhd +++ b/shutdownlogic/config.vhd @@ -30,10 +30,11 @@ package config is --set to 0 for backplane serdes, set to 3 for front SFP serdes constant SERDES_NUM : integer := 3; - constant INCLUDE_UART : integer := c_YES; + constant INCLUDE_UART : integer := c_NO; constant INCLUDE_SPI : integer := c_YES; + constant INCLUDE_ADC : integer := c_YES; constant INCLUDE_I2C : integer := c_NO; - constant INCLUDE_DEBUG_INTERFACE: integer := c_YES; + constant INCLUDE_DEBUG_INTERFACE: integer := c_NO; --input monitor and trigger generation logic constant INCLUDE_TRIGGER_LOGIC : integer := c_YES; diff --git a/shutdownlogic/config_compile_frankfurt.pl b/shutdownlogic/config_compile_frankfurt.pl index 5f49246..882ea30 100644 --- a/shutdownlogic/config_compile_frankfurt.pl +++ b/shutdownlogic/config_compile_frankfurt.pl @@ -1,8 +1,8 @@ TOPNAME => "trb3sc_basic", lm_license_file_for_synplify => "27020\@jspc29", #"27000\@lxcad01.gsi.de"; lm_license_file_for_par => "1702\@hadeb05.gsi.de", -lattice_path => '/d/jspc29/lattice/diamond/3.11_x64', -synplify_path => '/d/jspc29/lattice/synplify/P-2019.09-SP1/', +lattice_path => '/d/jspc29/lattice/diamond/3.12', +synplify_path => '/d/jspc29/lattice/synplify/S-2021.09-SP2/', #synplify_command => "/d/jspc29/lattice/diamond/3.6_x64/bin/lin64/synpwrap -fg -options", # synplify_command => "/d/jspc29/lattice/synplify/J-2014.09-SP2/bin/synplify_premier_dp", diff --git a/shutdownlogic/trb3sc_basic.prj b/shutdownlogic/trb3sc_basic.prj index 3f87e9e..f698ed8 100644 --- a/shutdownlogic/trb3sc_basic.prj +++ b/shutdownlogic/trb3sc_basic.prj @@ -109,7 +109,7 @@ add_file -vhdl -lib work "../../trbnet/special/spi_slim.vhd" add_file -vhdl -lib work "../../trbnet/special/spi_databus_memory.vhd" add_file -vhdl -lib work "../../trbnet/special/fpga_reboot.vhd" add_file -vhdl -lib work "../../trb3sc/code/trb3sc_tools.vhd" -add_file -vhdl -lib work "../../trb3sc/code/lcd.vhd" +#add_file -vhdl -lib work "../../trb3sc/code/lcd.vhd" add_file -vhdl -lib work "../../trb3sc/code/debuguart.vhd" add_file -vhdl -lib work "../../trbnet/special/uart.vhd" add_file -vhdl -lib work "../../trbnet/special/uart_rec.vhd" @@ -119,6 +119,8 @@ add_file -vhdl -lib work "../../trb3sc/code/load_settings.vhd" add_file -vhdl -lib work "../../trb3sc/code/spi_master_generic.vhd" add_file -vhdl -lib work "../../trb3/base/code/input_to_trigger_logic_record.vhd" add_file -vhdl -lib work "../../trb3/base/code/input_statistics.vhd" +add_file -vhdl -lib work "../../trbnet/basics/ram_dp_19x8_preset.vhd" +add_file -vhdl -lib work "../../trb3sc/code/adc_controller.vhd" #SlowControl files add_file -vhdl -lib work "../../trbnet/trb_net16_regio_bus_handler.vhd"